{"id":"https://openalex.org/W2318463189","doi":"https://doi.org/10.5220/0005190501770183","title":"Neuron Models in FPGA Hardware - A Route from High Level Descriptions to Hardware Implementations","display_name":"Neuron Models in FPGA Hardware - A Route from High Level Descriptions to Hardware Implementations","publication_year":2014,"publication_date":"2014-01-01","ids":{"openalex":"https://openalex.org/W2318463189","doi":"https://doi.org/10.5220/0005190501770183","mag":"2318463189"},"language":"en","primary_location":{"id":"doi:10.5220/0005190501770183","is_oa":true,"landing_page_url":"https://doi.org/10.5220/0005190501770183","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2nd International Congress on Neurotechnology, Electronics and Informatics","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.5220/0005190501770183","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090363223","display_name":"Finn Krewer","orcid":"https://orcid.org/0009-0005-1727-4459"},"institutions":[{"id":"https://openalex.org/I181231927","display_name":"National University of Ireland","ror":"https://ror.org/00shsf120","country_code":"IE","type":"education","lineage":["https://openalex.org/I181231927"]}],"countries":["IE"],"is_corresponding":true,"raw_author_name":"Finn Krewer","raw_affiliation_strings":["National University of Ireland, Ireland"],"affiliations":[{"raw_affiliation_string":"National University of Ireland, Ireland","institution_ids":["https://openalex.org/I181231927"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035636587","display_name":"Aedan Coffey","orcid":null},"institutions":[{"id":"https://openalex.org/I181231927","display_name":"National University of Ireland","ror":"https://ror.org/00shsf120","country_code":"IE","type":"education","lineage":["https://openalex.org/I181231927"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Aedan Coffey","raw_affiliation_strings":["National University of Ireland, Ireland"],"affiliations":[{"raw_affiliation_string":"National University of Ireland, Ireland","institution_ids":["https://openalex.org/I181231927"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020509977","display_name":"Frank Callaly","orcid":"https://orcid.org/0009-0006-8562-0648"},"institutions":[{"id":"https://openalex.org/I181231927","display_name":"National University of Ireland","ror":"https://ror.org/00shsf120","country_code":"IE","type":"education","lineage":["https://openalex.org/I181231927"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Frank Callaly","raw_affiliation_strings":["National University of Ireland, Ireland"],"affiliations":[{"raw_affiliation_string":"National University of Ireland, Ireland","institution_ids":["https://openalex.org/I181231927"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101528290","display_name":"Fearghal Morgan","orcid":"https://orcid.org/0009-0008-7778-2596"},"institutions":[{"id":"https://openalex.org/I181231927","display_name":"National University of Ireland","ror":"https://ror.org/00shsf120","country_code":"IE","type":"education","lineage":["https://openalex.org/I181231927"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Fearghal Morgan","raw_affiliation_strings":["National University of Ireland, Ireland"],"affiliations":[{"raw_affiliation_string":"National University of Ireland, Ireland","institution_ids":["https://openalex.org/I181231927"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5090363223"],"corresponding_institution_ids":["https://openalex.org/I181231927"],"apc_list":null,"apc_paid":null,"fwci":1.636,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.88120469,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"177","last_page":"183"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9929999709129333,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9929999709129333,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9769999980926514,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9592000246047974,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.840207576751709},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.736449658870697},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.6180251240730286},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5709792375564575},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5248486995697021},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.48937052488327026},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.11154893040657043}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.840207576751709},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.736449658870697},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.6180251240730286},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5709792375564575},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5248486995697021},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.48937052488327026},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.11154893040657043}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.5220/0005190501770183","is_oa":true,"landing_page_url":"https://doi.org/10.5220/0005190501770183","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2nd International Congress on Neurotechnology, Electronics and Informatics","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.5220/0005190501770183","is_oa":true,"landing_page_url":"https://doi.org/10.5220/0005190501770183","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2nd International Congress on Neurotechnology, Electronics and Informatics","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2995926156","https://openalex.org/W2063534976","https://openalex.org/W2284838239","https://openalex.org/W4306317586","https://openalex.org/W3094426418","https://openalex.org/W2793542907","https://openalex.org/W4376988926","https://openalex.org/W2373066471","https://openalex.org/W1508811950","https://openalex.org/W4366380722"],"abstract_inverted_index":null,"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
