{"id":"https://openalex.org/W7160519801","doi":"https://doi.org/10.48550/arxiv.2605.04704","title":"UVMarvel: an Automated LLM-aided UVM Machine for Subsystem-level RTL Verification","display_name":"UVMarvel: an Automated LLM-aided UVM Machine for Subsystem-level RTL Verification","publication_year":2026,"publication_date":"2026-05-06","ids":{"openalex":"https://openalex.org/W7160519801","doi":"https://doi.org/10.48550/arxiv.2605.04704"},"language":null,"primary_location":{"id":"doi:10.48550/arxiv.2605.04704","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2605.04704","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Preprint"},"type":"preprint","indexed_in":["datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://doi.org/10.48550/arxiv.2605.04704","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5135581859","display_name":"Junhao Ye","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ye, Junhao","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026207504","display_name":"Dingrong Pan","orcid":"https://orcid.org/0009-0009-3947-5496"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Pan, Dingrong","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5135610241","display_name":"Hanyuan Liu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Liu, Hanyuan","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5135551109","display_name":"Yuchen Hu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hu, Yuchen","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5135597129","display_name":"Jie Zhou","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Zhou, Jie","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5135560103","display_name":"Ke Xu","orcid":"https://orcid.org/0000-0002-7807-8444"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xu, Ke","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5135598942","display_name":"Xinwei Fang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Fang, Xinwei","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5135595847","display_name":"Xi Wang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Wang, Xi","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5135588355","display_name":"Nan Guan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Guan, Nan","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5135582803","display_name":"Zhe Jiang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jiang, Zhe","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.5353999733924866,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.5353999733924866,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.32199999690055847,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11450","display_name":"Model-Driven Software Engineering Techniques","score":0.019600000232458115,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.5284000039100647},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.4749000072479248},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.429500013589859},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.4018000066280365},{"id":"https://openalex.org/keywords/intelligent-verification","display_name":"Intelligent verification","score":0.392300009727478},{"id":"https://openalex.org/keywords/protocol","display_name":"Protocol (science)","score":0.3874000012874603}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8421000242233276},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5422999858856201},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.5284000039100647},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.4749000072479248},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.429500013589859},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.4018000066280365},{"id":"https://openalex.org/C3406870","wikidata":"https://www.wikidata.org/wiki/Q6044160","display_name":"Intelligent verification","level":5,"score":0.392300009727478},{"id":"https://openalex.org/C2780385302","wikidata":"https://www.wikidata.org/wiki/Q367158","display_name":"Protocol (science)","level":3,"score":0.3874000012874603},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.3871999979019165},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.37299999594688416},{"id":"https://openalex.org/C187250869","wikidata":"https://www.wikidata.org/wiki/Q5754573","display_name":"High-level verification","level":5,"score":0.3416999876499176},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3222000002861023},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.31220000982284546},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.29679998755455017},{"id":"https://openalex.org/C2776359362","wikidata":"https://www.wikidata.org/wiki/Q2145286","display_name":"Representation (politics)","level":3,"score":0.27399998903274536}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.48550/arxiv.2605.04704","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2605.04704","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"Preprint"}],"best_oa_location":{"id":"doi:10.48550/arxiv.2605.04704","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2605.04704","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Preprint"},"sustainable_development_goals":[{"score":0.6035476326942444,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Verification":[0,19],"presents":[1],"a":[2,78,93,97,141],"major":[3],"bottleneck":[4],"in":[5],"Integrated":[6],"Circuit":[7],"(IC)":[8],"development,":[9],"consuming":[10],"nearly":[11],"70%":[12],"of":[13,112,129],"total":[14],"effort.":[15],"While":[16],"the":[17,108],"Universal":[18],"Methodology":[20],"(UVM)":[21],"improves":[22],"reuse":[23],"through":[24],"structured":[25],"verification":[26,56,133],"environments,":[27],"constructing":[28,114],"subsystem-level":[29,69,88,115],"UVM":[30,66,89,116],"testbenches":[31,67,117],"and":[32,45,48,77,91,96,122],"generating":[33],"high-quality":[34],"stimuli":[35,104],"still":[36],"require":[37],"extensive":[38],"manual":[39],"coding,":[40],"repeated":[41],"EDA":[42],"tool":[43],"runs,":[44],"deep":[46],"protocol":[47],"micro-architectural":[49],"expertise.":[50],"We":[51],"present":[52],"UVMarvel,":[53],"an":[54,73,125],"automated":[55,143],"framework":[57,110],"that":[58],"leverages":[59],"Large":[60],"Language":[61],"Models":[62],"(LLMs)":[63],"to":[64,82,101,140],"build":[65],"for":[68],"RTL.":[70],"UVMarvel":[71,106],"introduces":[72],"Intermediate":[74],"Representation":[75],"(IR)":[76],"Bus":[79],"Protocol":[80],"Library":[81,100],"translate":[83],"heterogeneous":[84],"specifications":[85],"into":[86],"protocol-correct":[87],"testbenches,":[90],"employs":[92],"Signal":[94],"Tracker":[95],"Verilog":[98],"Patching":[99],"guide":[102],"LLM-based":[103],"refinement.":[105],"is":[107],"first":[109],"capable":[111],"automatically":[113],"across":[118],"mainstream":[119],"bus":[120],"protocols,":[121],"it":[123],"achieves":[124],"average":[126],"code":[127],"coverage":[128],"95.65%,":[130],"while":[131],"reducing":[132],"time":[134],"from":[135],"several":[136],"human":[137],"working":[138],"days":[139],"4.5-hour":[142],"execution.":[144]},"counts_by_year":[],"updated_date":"2026-07-01T06:00:48.157686","created_date":"2026-05-08T00:00:00"}
