{"id":"https://openalex.org/W7158797093","doi":"https://doi.org/10.48550/arxiv.2604.26103","title":"AMMA: A Multi-Chiplet Memory-Centric Architecture for Low-Latency 1M Context Attention Serving","display_name":"AMMA: A Multi-Chiplet Memory-Centric Architecture for Low-Latency 1M Context Attention Serving","publication_year":2026,"publication_date":"2026-04-28","ids":{"openalex":"https://openalex.org/W7158797093","doi":"https://doi.org/10.48550/arxiv.2604.26103"},"language":null,"primary_location":{"id":"doi:10.48550/arxiv.2604.26103","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.26103","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article"},"type":"preprint","indexed_in":["datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://doi.org/10.48550/arxiv.2604.26103","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5124365093","display_name":"Zhongkai Yu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yu, Zhongkai","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134911067","display_name":"Haotian Ye","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ye, Haotian","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134921004","display_name":"Chenyang Zhou","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Zhou, Chenyang","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5093410279","display_name":"Ohm Rishabh Venkatachalam","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Venkatachalam, Ohm Rishabh","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134912467","display_name":"Zaifeng Pan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Pan, Zaifeng","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134887571","display_name":"Zhengding Hu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hu, Zhengding","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134902475","display_name":"Junsung Kim","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kim, Junsung","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017913155","display_name":"Won Woo Ro","orcid":"https://orcid.org/0000-0001-5390-6445"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ro, Won Woo","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134901540","display_name":"Po-An Tsai","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tsai, Po-An","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085780376","display_name":"Shuyi Pei","orcid":"https://orcid.org/0000-0002-8649-4253"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Pei, Shuyi","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134885902","display_name":"Yangwook Kang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kang, Yangwook","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5134908968","display_name":"Yufei Ding","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ding, Yufei","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":12,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8490999937057495,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8490999937057495,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.03909999877214432,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.01769999973475933,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.6574000120162964},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.6438999772071838},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6085000038146973},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.5450999736785889},{"id":"https://openalex.org/keywords/snapshot","display_name":"Snapshot (computer storage)","score":0.4742000102996826},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.46239998936653137},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.41850000619888306},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4147000014781952},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.38089999556541443}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8219000101089478},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.6574000120162964},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.6438999772071838},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6085000038146973},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5450999736785889},{"id":"https://openalex.org/C55282118","wikidata":"https://www.wikidata.org/wiki/Q252683","display_name":"Snapshot (computer storage)","level":2,"score":0.4742000102996826},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.46239998936653137},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.46219998598098755},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4503999948501587},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.41850000619888306},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4147000014781952},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.382099986076355},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.38089999556541443},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.3797000050544739},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.3610000014305115},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.34689998626708984},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3327000141143799},{"id":"https://openalex.org/C200157131","wikidata":"https://www.wikidata.org/wiki/Q4854763","display_name":"Bandwidth allocation","level":3,"score":0.3118000030517578},{"id":"https://openalex.org/C1793878","wikidata":"https://www.wikidata.org/wiki/Q1153762","display_name":"Out-of-order execution","level":2,"score":0.3061999976634979},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.3012000024318695},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.2849000096321106},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.28119999170303345},{"id":"https://openalex.org/C147297375","wikidata":"https://www.wikidata.org/wiki/Q6674930","display_name":"Look-ahead","level":2,"score":0.2766999900341034},{"id":"https://openalex.org/C168522837","wikidata":"https://www.wikidata.org/wiki/Q679552","display_name":"Branch predictor","level":2,"score":0.27570000290870667},{"id":"https://openalex.org/C46637626","wikidata":"https://www.wikidata.org/wiki/Q6693015","display_name":"Low latency (capital markets)","level":2,"score":0.27379998564720154},{"id":"https://openalex.org/C118993495","wikidata":"https://www.wikidata.org/wiki/Q5042828","display_name":"Electrical efficiency","level":3,"score":0.265500009059906},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.2632000148296356},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.26260000467300415},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.2563000023365021},{"id":"https://openalex.org/C61483411","wikidata":"https://www.wikidata.org/wiki/Q3124522","display_name":"Data parallelism","level":3,"score":0.25519999861717224},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2540000081062317},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.25290000438690186}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.48550/arxiv.2604.26103","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.26103","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"article"}],"best_oa_location":{"id":"doi:10.48550/arxiv.2604.26103","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.26103","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8983749747276306,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"All":[0],"current":[1],"LLM":[2],"serving":[3,52],"systems":[4],"place":[5],"the":[6,9,27,30,37,45,83,112,207],"GPU":[7,28,104],"at":[8],"center,":[10],"from":[11],"production-level":[12],"attention-FFN":[13],"disaggregation":[14],"to":[15,116],"NVIDIA's":[16],"Rubin":[17],"GPU-LPU":[18],"heterogeneous":[19],"platform.":[20],"Even":[21],"academic":[22],"PIM/PNM":[23],"proposals":[24],"still":[25],"treat":[26],"as":[29,68],"central":[31],"hub":[32],"for":[33,98,142,188],"cross-device":[34],"communication.":[35],"Yet":[36],"GPU's":[38],"compute-rich":[39],"architecture":[40,97],"is":[41,66],"fundamentally":[42],"mismatched":[43],"with":[44,107,206],"memory-bound":[46,119],"nature":[47],"of":[48],"decode-phase":[49],"attention,":[50],"inflating":[51],"latency":[53,82,199],"while":[54],"wasting":[55],"power":[56,148,179],"and":[57,70,149,158,180,200],"die":[58],"area":[59,150],"on":[60],"idle":[61],"compute":[62,105,178],"units.":[63],"The":[64],"problem":[65],"compounded":[67],"reasoning":[69],"agentic":[71],"workloads":[72],"push":[73],"context":[74],"lengths":[75],"toward":[76],"one":[77],"million":[78],"tokens,":[79],"making":[80],"attention":[81,120,144,198],"primary":[84],"user-facing":[85],"bottleneck.":[86],"To":[87,122],"address":[88],"these":[89],"inefficiencies,":[90],"we":[91,130],"present":[92],"AMMA,":[93],"a":[94,133,146,153,160,173],"multi-chiplet,":[95],"memory-centric":[96],"low-latency":[99],"long-context":[100],"attention.":[101],"AMMA":[102,194],"replaces":[103],"dies":[106],"HBM-PNM":[108],"cubes,":[109],"roughly":[110],"doubling":[111],"available":[113],"memory":[114],"bandwidth":[115,125,141],"better":[117],"serve":[118],"workloads.":[121],"translate":[123],"this":[124],"into":[126],"proportional":[127],"performance":[128],"gains,":[129],"introduce":[131],"(i)":[132],"logic-die":[134],"microarchitecture":[135],"that":[136,164,193],"fully":[137],"exploits":[138],"per-cube":[139,177],"internal":[140],"decode":[143],"under":[145],"minimal":[147],"budget,":[151],"(ii)":[152],"two-level":[154],"hybrid":[155],"parallelism":[156],"scheme,":[157],"(iii)":[159],"reordered":[161],"collective":[162],"flow":[163],"reduces":[165],"intra-chip":[166,181],"die-to-die":[167],"communication":[168],"overhead.":[169],"We":[170],"further":[171],"conduct":[172],"design-space":[174],"exploration":[175],"over":[176],"D2D":[182],"link":[183],"bandwidth,":[184],"providing":[185],"actionable":[186],"guidance":[187],"hardware":[189],"designers.":[190],"Evaluations":[191],"show":[192],"achieves":[195],"15.5X":[196],"lower":[197,202],"6.9X":[201],"energy":[203],"consumption":[204],"compared":[205],"NVIDIA":[208],"H100.":[209]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2026-05-01T00:00:00"}