{"id":"https://openalex.org/W7156773763","doi":"https://doi.org/10.48550/arxiv.2604.23355","title":"LEGO: An LLM Skill-Based Front-End Design Generation Platform","display_name":"LEGO: An LLM Skill-Based Front-End Design Generation Platform","publication_year":2026,"publication_date":"2026-04-25","ids":{"openalex":"https://openalex.org/W7156773763","doi":"https://doi.org/10.48550/arxiv.2604.23355"},"language":null,"primary_location":{"id":"doi:10.48550/arxiv.2604.23355","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.23355","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article"},"type":"preprint","indexed_in":["datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://doi.org/10.48550/arxiv.2604.23355","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012975828","display_name":"Jincheng Lou","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Lou, Jincheng","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134804166","display_name":"Ruohan Xu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xu, Ruohan","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134820886","display_name":"Jiecheng Ma","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ma, Jiecheng","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134811178","display_name":"Runzhe Tao","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tao, Runzhe","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134780329","display_name":"Xinyu Qu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Qu, Xinyu","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5000933188","display_name":"Yibo Lin","orcid":"https://orcid.org/0000-0002-0977-2774"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Lin, Yibo","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.15399999916553497,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.15399999916553497,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.12530000507831573,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.07739999890327454,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.7053999900817871},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.6796000003814697},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.6721000075340271},{"id":"https://openalex.org/keywords/executable","display_name":"Executable","score":0.6219000220298767},{"id":"https://openalex.org/keywords/embedding","display_name":"Embedding","score":0.5160999894142151},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.45820000767707825}],"concepts":[{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.7053999900817871},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.6796000003814697},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.6721000075340271},{"id":"https://openalex.org/C160145156","wikidata":"https://www.wikidata.org/wiki/Q778586","display_name":"Executable","level":2,"score":0.6219000220298767},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6029000282287598},{"id":"https://openalex.org/C41608201","wikidata":"https://www.wikidata.org/wiki/Q980509","display_name":"Embedding","level":2,"score":0.5160999894142151},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.45820000767707825},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.44690001010894775},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.36010000109672546},{"id":"https://openalex.org/C167822520","wikidata":"https://www.wikidata.org/wiki/Q176452","display_name":"Finite-state machine","level":2,"score":0.3580000102519989},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3521000146865845},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3280999958515167},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3125},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.302700012922287},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.2964000105857849},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.29440000653266907},{"id":"https://openalex.org/C26490066","wikidata":"https://www.wikidata.org/wiki/Q17006835","display_name":"Circuit extraction","level":4,"score":0.2655999958515167},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2574000060558319}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.48550/arxiv.2604.23355","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.23355","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"article"}],"best_oa_location":{"id":"doi:10.48550/arxiv.2604.23355","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.23355","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/4","display_name":"Quality Education","score":0.7005273699760437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Existing":[0],"LLM-based":[1],"EDA":[2],"agents":[3],"are":[4,193],"often":[5],"isolated":[6],"task-specific":[7],"systems.":[8],"This":[9,143],"leads":[10],"to":[11,123,141],"repeated":[12],"engineering":[13],"effort":[14,128],"and":[15,21,45,76,163,181,189],"limited":[16],"reuse":[17],"of":[18,115],"successful":[19],"design":[20,33,184],"debugging":[22],"strategies.":[23],"We":[24],"present":[25],"LEGO,":[26],"a":[27,51,57,83,112],"unified":[28],"skill-based":[29],"platform":[30,188],"for":[31],"front-end":[32,39],"generation.":[34],"It":[35],"decomposes":[36],"the":[37,149],"digital":[38],"flow":[40],"into":[41],"six":[42],"independent":[43],"steps":[44],"represents":[46],"every":[47],"agent":[48],"capability":[49],"as":[50],"standardized":[52],"composable":[53],"circuit":[54,80,132,191],"skill":[55,63,93,152,176],"within":[56,82,135],"plug-and-play":[58],"architecture.":[59],"To":[60],"build":[61],"this":[62],"library,":[64],"we":[65],"survey":[66],"more":[67],"than":[68],"100":[69],"papers,":[70],"select":[71],"11":[72],"representative":[73],"open-source":[74],"projects,":[75],"extract":[77],"42":[78],"executable":[79],"skills":[81,133,192],"six-step":[84],"finite":[85],"state":[86],"machine":[87],"formulation.":[88],"Circuit":[89],"Skill":[90,99],"Builder":[91],"automates":[92],"extraction":[94],"with":[95],"linear":[96],"scalability.":[97],"Agent":[98],"RAG":[100],"achieves":[101],"submillisecond":[102],"retrieval":[103],"without":[104],"relying":[105],"on":[106,111],"embedding":[107],"models.":[108],"Empirical":[109],"evaluation":[110],"hard":[113],"subset":[114],"41":[116],"VerilogEval":[117],"v2":[118],"problems":[119],"that":[120,130,174],"gpt-5.2-codex":[121],"fails":[122],"solve":[124],"under":[125],"extra-high":[126],"reasoning":[127],"shows":[129],"individual":[131],"constructed":[134],"LEGO":[136,187],"raise":[137],"Pass@1":[138],"from":[139],"0.000":[140],"0.805.":[142],"is":[144],"an":[145],"80.5%":[146],"gain":[147],"over":[148],"baseline.":[150],"Cross-project":[151],"compositions":[153],"also":[154,168],"reach":[155],"0.805":[156],"Pass@1.":[157],"They":[158,167],"outperform":[159],"hierarchy-verilog":[160],"by":[161,165],"14.6%":[162],"VerilogCoder":[164],"2.5%.":[166],"match":[169],"MAGE.":[170],"These":[171],"results":[172],"show":[173],"modular":[175],"composition":[177],"supports":[178],"both":[179],"effective":[180],"flexible":[182],"RTL":[183],"automation.":[185],"The":[186],"all":[190],"publicly":[194],"available":[195],"at":[196],"GitHub:":[197],"https://github.com/loujc/LEGO-An-LLM-Skill-Based-Front-End-Design-Generation-Platform":[198]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2026-04-29T00:00:00"}
