{"id":"https://openalex.org/W7155016287","doi":"https://doi.org/10.48550/arxiv.2604.16007","title":"MemExplorer: Navigating the Heterogeneous Memory Design Space for Agentic Inference NPUs","display_name":"MemExplorer: Navigating the Heterogeneous Memory Design Space for Agentic Inference NPUs","publication_year":2026,"publication_date":"2026-04-17","ids":{"openalex":"https://openalex.org/W7155016287","doi":"https://doi.org/10.48550/arxiv.2604.16007"},"language":null,"primary_location":{"id":"doi:10.48550/arxiv.2604.16007","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.16007","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Preprint"},"type":"preprint","indexed_in":["datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://doi.org/10.48550/arxiv.2604.16007","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5134085235","display_name":"Haoran Wu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Wu, Haoran","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5128745216","display_name":"Zeyu Cao","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Cao, Zeyu","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134061876","display_name":"Yao Lai","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Lai, Yao","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060393103","display_name":"Binglei Lou","orcid":"https://orcid.org/0000-0003-4662-1892"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Lou, Binglei","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5124271622","display_name":"Jiayi Nie","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Nie, Jiayi","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134057454","display_name":"Can Xiao","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xiao, Can","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134057787","display_name":"Timi Adeniran","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Adeniran, Timi","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134027946","display_name":"Przemyslaw Forys","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Forys, Przemyslaw","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030694272","display_name":"Kauser Johar","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Johar, Kauser","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134055809","display_name":"Catriona Wright","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Wright, Catriona","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134032461","display_name":"Junyi Liu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Liu, Junyi","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134011108","display_name":"Kai Shi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Shi, Kai","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026859250","display_name":"Nicholas D. Lane","orcid":"https://orcid.org/0000-0002-9954-6366"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Lane, Nicholas D.","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009099496","display_name":"Rika Antonova","orcid":"https://orcid.org/0000-0002-3018-2445"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Antonova, Rika","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060302344","display_name":"Jianyi Cheng","orcid":"https://orcid.org/0000-0003-2791-2555"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Cheng, Jianyi","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001709101","display_name":"Timothy W. Jones","orcid":"https://orcid.org/0000-0002-7989-1998"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jones, Timothy","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113840125","display_name":"Aaron Zhao","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Zhao, Aaron","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5134079380","display_name":"Robert Mullins","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Mullins, Robert","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.3452000021934509,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.3452000021934509,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.16359999775886536,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.1266999989748001,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inference","display_name":"Inference","score":0.522599995136261},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.501800000667572},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.4896000027656555},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4350999891757965},{"id":"https://openalex.org/keywords/baseline","display_name":"Baseline (sea)","score":0.4262000024318695},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.40369999408721924},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3682999908924103},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.36719998717308044}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7300000190734863},{"id":"https://openalex.org/C2776214188","wikidata":"https://www.wikidata.org/wiki/Q408386","display_name":"Inference","level":2,"score":0.522599995136261},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.501800000667572},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.4896000027656555},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4350999891757965},{"id":"https://openalex.org/C12725497","wikidata":"https://www.wikidata.org/wiki/Q810247","display_name":"Baseline (sea)","level":2,"score":0.4262000024318695},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.40369999408721924},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3682999908924103},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.36719998717308044},{"id":"https://openalex.org/C12186640","wikidata":"https://www.wikidata.org/wiki/Q6815743","display_name":"Memory model","level":3,"score":0.35600000619888306},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.32919999957084656},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3151000142097473},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.30720001459121704},{"id":"https://openalex.org/C38677869","wikidata":"https://www.wikidata.org/wiki/Q724168","display_name":"Petri net","level":2,"score":0.3041999936103821},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.2890999913215637},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.2816999852657318},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.2711000144481659},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.26969999074935913},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.26759999990463257},{"id":"https://openalex.org/C31352089","wikidata":"https://www.wikidata.org/wiki/Q3750474","display_name":"Systems design","level":2,"score":0.2648000121116638},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.2639000117778778},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.25429999828338623}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.48550/arxiv.2604.16007","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.16007","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"Preprint"}],"best_oa_location":{"id":"doi:10.48550/arxiv.2604.16007","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.16007","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Preprint"},"sustainable_development_goals":[{"score":0.8565210700035095,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Emerging":[0],"agentic":[1,199],"LLM":[2],"workloads":[3],"are":[4],"driving":[5],"rapidly":[6,102],"growing":[7],"demand":[8],"on":[9],"both":[10],"memory":[11,51,64,91,117,132,147,163],"capacity":[12],"and":[13,22,72,85,101,116,155,157,177,181,213,236,245],"bandwidth,":[14,84],"with":[15,166],"different":[16,82,150],"phases":[17],"of":[18,62],"inference":[19,95],"(e.g.,":[20,153,170],"prefill":[21],"decode)":[23],"imposing":[24],"distinct":[25],"requirements.":[26],"Industry":[27],"is":[28,55],"responding":[29],"by":[30,40,58],"composing":[31],"heterogeneous":[32,136,162],"accelerators":[33,96],"into":[34],"single":[35],"interconnected":[36],"systems,":[37],"as":[38,76],"exemplified":[39],"NVIDIA's":[41],"Vera":[42],"Rubin":[43],"platform,":[44],"where":[45],"each":[46,80],"device":[47],"brings":[48],"its":[49],"own":[50],"architecture.":[52],"This":[53],"heterogeneity":[54],"further":[56,231],"compounded":[57],"a":[59,99,130,141,185],"widening":[60],"landscape":[61],"available":[63],"technologies:":[65],"high-density":[66],"on-chip":[67,154],"SRAM,":[68],"HBM,":[69],"LPDDR,":[70],"GDDR,":[71],"emerging":[73],"options":[74],"such":[75],"high-bandwidth":[77],"flash":[78],"(HBF),":[79],"offering":[81],"capacity,":[83],"power":[86,178,196,239],"trade-offs.":[87],"Identifying":[88],"the":[89,108,194,210,219,227,242],"right":[90],"architecture":[92],"for":[93,135,144,198],"next-generation":[94],"requires":[97],"navigating":[98],"vast":[100],"evolving":[103],"design":[104,114,119,168],"space,":[105],"in":[106,184,218,226],"which":[107],"interplay":[109],"between":[110,179],"workload":[111],"characteristics,":[112],"NPU":[113,137,167,187,212,244],"dimensions,":[115],"system":[118,133,164],"remains":[120],"largely":[121],"underexplored.":[122],"To":[123],"address":[124],"this":[125],"challenge,":[126],"we":[127],"present":[128],"MemExplorer,":[129],"new":[131],"synthesizer":[134],"systems.":[138],"MemExplorer":[139,201],"provides":[140],"unified":[142],"abstraction":[143],"modeling":[145],"diverse":[146],"technologies":[148],"across":[149],"hierarchy":[151],"levels":[152],"off-chip)":[156],"automatically":[158],"determines":[159],"an":[160],"efficient":[161],"together":[165],"choices":[169],"matrix":[171],"engine":[172],"size)":[173],"to":[174,204,234],"balance":[175],"throughput":[176],"prefilling":[180],"decoding":[182],"devices":[183],"multi-device":[186],"system.":[188],"Experimental":[189],"results":[190],"show":[191],"that,":[192],"under":[193],"same":[195],"budget":[197],"workloads,":[200],"achieves":[202],"up":[203,233],"2.3x":[205],"higher":[206,215,238],"energy":[207],"efficiency":[208,240],"than":[209,216],"baseline":[211,243],"3.23x":[214],"H100":[217],"prefill-only":[220],"setting.":[221],"Under":[222],"equivalent":[223],"performance":[224],"targets":[225],"decode":[228],"setting,":[229],"it":[230],"delivers":[232],"1.93x":[235],"2.72x":[237],"over":[241],"H100,":[246],"respectively.":[247]},"counts_by_year":[],"updated_date":"2026-07-01T06:00:48.157686","created_date":"2026-04-21T00:00:00"}
