{"id":"https://openalex.org/W7153130996","doi":"https://doi.org/10.48550/arxiv.2604.07628","title":"Trilinear Compute-in-Memory Architecture for Energy-Efficient Transformer Acceleration","display_name":"Trilinear Compute-in-Memory Architecture for Energy-Efficient Transformer Acceleration","publication_year":2026,"publication_date":"2026-04-08","ids":{"openalex":"https://openalex.org/W7153130996","doi":"https://doi.org/10.48550/arxiv.2604.07628"},"language":null,"primary_location":{"id":"doi:10.48550/arxiv.2604.07628","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.07628","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article"},"type":"preprint","indexed_in":["datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://doi.org/10.48550/arxiv.2604.07628","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047546816","display_name":"Md Zesun Ahmed Mia","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Mia, Md Zesun Ahmed","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019546457","display_name":"Jiahui Duan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Duan, Jiahui","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5133385628","display_name":"Kai Ni","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ni, Kai","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5032635465","display_name":"Abhronil Sengupta","orcid":"https://orcid.org/0000-0002-5545-4494"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sengupta, Abhronil","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5047546816"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9571999907493591,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9571999907493591,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.01899999938905239,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.006399999838322401,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.760200023651123},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.6399999856948853},{"id":"https://openalex.org/keywords/transformer","display_name":"Transformer","score":0.583299994468689},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4740999937057495},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4307999908924103},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.414900004863739},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.34470000863075256},{"id":"https://openalex.org/keywords/resistive-touchscreen","display_name":"Resistive touchscreen","score":0.34389999508857727},{"id":"https://openalex.org/keywords/firmware","display_name":"Firmware","score":0.3353999853134155}],"concepts":[{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.760200023651123},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.6399999856948853},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.60589998960495},{"id":"https://openalex.org/C66322947","wikidata":"https://www.wikidata.org/wiki/Q11658","display_name":"Transformer","level":3,"score":0.583299994468689},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4740999937057495},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4352000057697296},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4307999908924103},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.414900004863739},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4120999872684479},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.375900000333786},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.34470000863075256},{"id":"https://openalex.org/C6899612","wikidata":"https://www.wikidata.org/wiki/Q852911","display_name":"Resistive touchscreen","level":2,"score":0.34389999508857727},{"id":"https://openalex.org/C67212190","wikidata":"https://www.wikidata.org/wiki/Q104851","display_name":"Firmware","level":2,"score":0.3353999853134155},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3337000012397766},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.3203999996185303},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.31349998712539673},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.30809998512268066},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.30399999022483826},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.2912999987602234},{"id":"https://openalex.org/C98025372","wikidata":"https://www.wikidata.org/wiki/Q477538","display_name":"Systems architecture","level":3,"score":0.2896000146865845},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28859999775886536},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.28189998865127563},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.2777999937534332},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.2741999924182892},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.2736999988555908},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2606000006198883},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.25450000166893005},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.25369998812675476},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.2535000145435333}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.48550/arxiv.2604.07628","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.07628","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"article"}],"best_oa_location":{"id":"doi:10.48550/arxiv.2604.07628","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.07628","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.910517156124115,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Self-attention":[0],"in":[1,130],"Transformers":[2],"generates":[3],"dynamic":[4,74],"operands":[5],"that":[6,59],"force":[7],"conventional":[8,88,108],"Compute-in-Memory":[9],"(CIM)":[10],"accelerators":[11],"into":[12],"costly":[13],"non-volatile":[14],"memory":[15],"(NVM)":[16],"reprogramming":[17],"cycles,":[18],"degrading":[19],"throughput":[20],"and":[21,81,84,103],"stressing":[22],"device":[23],"endurance.":[24],"Existing":[25],"solutions":[26],"either":[27],"reduce":[28],"but":[29],"retain":[30],"NVM":[31,49,131],"writes":[32],"through":[33],"matrix":[34],"decomposition":[35],"or":[36,38],"sparsity,":[37],"move":[39],"attention":[40,71,127],"computation":[41,72,128],"to":[42,63,99,123],"digital":[43],"CMOS":[44],"at":[45,111],"the":[46,120],"expense":[47],"of":[48,92],"density.":[50],"We":[51],"present":[52],"TrilinearCIM,":[53],"a":[54,65],"Double-Gate":[55],"FeFET":[56,109],"(DG-FeFET)-based":[57],"architecture":[58,122],"uses":[60],"back-gate":[61],"modulation":[62],"realize":[64],"three-operand":[66],"multiply-accumulate":[67],"primitive":[68],"for":[69],"in-memory":[70],"without":[73,133],"ferroelectric":[75],"reprogramming.":[76,135],"Evaluated":[77],"on":[78,90],"BERT-base":[79],"(GLUE)":[80],"ViT-base":[82],"(ImageNet":[83],"CIFAR),":[85],"TrilinearCIM":[86],"outperforms":[87],"CIM":[89,110],"seven":[91],"nine":[93],"GLUE":[94],"tasks":[95],"while":[96],"achieving":[97],"up":[98],"46.6\\%":[100],"energy":[101],"reduction":[102],"20.4\\%":[104],"latency":[105],"improvement":[106],"over":[107],"37.3\\%":[112],"area":[113],"overhead.":[114],"To":[115],"our":[116],"knowledge,":[117],"this":[118],"is":[119],"first":[121],"perform":[124],"complete":[125],"Transformer":[126],"exclusively":[129],"cores":[132],"runtime":[134]},"counts_by_year":[],"updated_date":"2026-04-11T06:19:08.300824","created_date":"2026-04-11T00:00:00"}
