{"id":"https://openalex.org/W7151949705","doi":"https://doi.org/10.48550/arxiv.2604.05191","title":"Experimental Demonstration of an On-Chip CMOS-Integrated 3T-1MTJ Probabilistic Bit -- A P-Bit","display_name":"Experimental Demonstration of an On-Chip CMOS-Integrated 3T-1MTJ Probabilistic Bit -- A P-Bit","publication_year":2026,"publication_date":"2026-04-06","ids":{"openalex":"https://openalex.org/W7151949705","doi":"https://doi.org/10.48550/arxiv.2604.05191"},"language":null,"primary_location":{"id":"doi:10.48550/arxiv.2604.05191","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.05191","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Preprint"},"type":"preprint","indexed_in":["datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://doi.org/10.48550/arxiv.2604.05191","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5133188921","display_name":"Xuejian Zhang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Zhang, Xuejian","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5133205447","display_name":"John Arnesh Divakaruni Daniel","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Daniel, John Arnesh Divakaruni","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022059369","display_name":"N. R. Dilley","orcid":"https://orcid.org/0000-0002-0811-0656"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Dilley, Neil","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5133169743","display_name":"Zhihong Chen","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chen, Zhihong","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5009261363","display_name":"Joerg Appenzeller","orcid":"https://orcid.org/0000-0002-7461-9223"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Appenzeller, Joerg","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.7486000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.7486000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.04520000144839287,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.04050000011920929,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/probabilistic-logic","display_name":"Probabilistic logic","score":0.8500999808311462},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6220999956130981},{"id":"https://openalex.org/keywords/randomness","display_name":"Randomness","score":0.558899998664856},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.555400013923645},{"id":"https://openalex.org/keywords/stochastic-computing","display_name":"Stochastic computing","score":0.5026000142097473},{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.4941999912261963},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.4226999878883362},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.414900004863739},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.36059999465942383}],"concepts":[{"id":"https://openalex.org/C49937458","wikidata":"https://www.wikidata.org/wiki/Q2599292","display_name":"Probabilistic logic","level":2,"score":0.8500999808311462},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6754000186920166},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6220999956130981},{"id":"https://openalex.org/C125112378","wikidata":"https://www.wikidata.org/wiki/Q176640","display_name":"Randomness","level":2,"score":0.558899998664856},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.555400013923645},{"id":"https://openalex.org/C2780971903","wikidata":"https://www.wikidata.org/wiki/Q2933705","display_name":"Stochastic computing","level":3,"score":0.5026000142097473},{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.4941999912261963},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.45649999380111694},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44780001044273376},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.4226999878883362},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.414900004863739},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.36059999465942383},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.35370001196861267},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.34940001368522644},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3481000065803528},{"id":"https://openalex.org/C23375383","wikidata":"https://www.wikidata.org/wiki/Q176499","display_name":"Unconventional computing","level":2,"score":0.3319999873638153},{"id":"https://openalex.org/C24404364","wikidata":"https://www.wikidata.org/wiki/Q7246846","display_name":"Probabilistic analysis of algorithms","level":3,"score":0.32199999690055847},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.3158000111579895},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3116999864578247},{"id":"https://openalex.org/C52063229","wikidata":"https://www.wikidata.org/wiki/Q7246845","display_name":"Probabilistic CTL","level":4,"score":0.310699999332428},{"id":"https://openalex.org/C179799912","wikidata":"https://www.wikidata.org/wiki/Q205084","display_name":"Computational complexity theory","level":2,"score":0.29980000853538513},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.28279998898506165},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2800000011920929},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.2745000123977661},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.2721000015735626},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.25949999690055847},{"id":"https://openalex.org/C136695289","wikidata":"https://www.wikidata.org/wiki/Q415568","display_name":"Bitstream","level":3,"score":0.2531000077724457},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2506999969482422}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.48550/arxiv.2604.05191","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.05191","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"Preprint"}],"best_oa_location":{"id":"doi:10.48550/arxiv.2604.05191","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2604.05191","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Preprint"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8055155277252197}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Ongoing":[0],"semiconductor":[1],"scaling":[2],"challenges":[3],"and":[4,23,42],"the":[5,43,59,85,128],"rise":[6],"of":[7,37,45,55,89,96,105,124],"neuromorphic":[8],"computing":[9,16,27,135],"have":[10],"sparked":[11],"interest":[12],"in":[13,118],"exploring":[14],"novel":[15,66],"schemes":[17],"to":[18,76],"achieve":[19],"higher":[20],"power":[21,34],"efficiency":[22],"computational":[24,40],"capabilities.":[25],"Probabilistic":[26],"is":[28,58],"one":[29],"candidate":[30],"that":[31],"endows":[32],"low":[33],"consumption,":[35],"capability":[36],"solving":[38],"probability-encoded":[39],"problems,":[41],"ease":[44],"integration":[46],"with":[47,101],"existing":[48],"CMOS":[49,138],"technology.":[50],"A":[51],"basic":[52],"building":[53],"block":[54],"this":[56,115],"scheme":[57],"probabilistic":[60,119,134],"bit":[61],"(P-Bit),":[62],"which":[63],"utilizes":[64],"a":[65,70,90,102],"device":[67],"such":[68,125],"as":[69],"stochastic":[71,99],"magnetic":[72],"tunnel":[73],"junction":[74],"(sMTJ)":[75],"generate":[77],"tunable":[78],"randomness":[79],"by":[80],"nature.":[81],"This":[82],"work":[83],"presents":[84],"first":[86],"experimental":[87],"demonstration":[88,123],"fully":[91],"CMOS-integrated":[92],"sMTJ-based":[93],"P-Bit,":[94],"capable":[95],"generating":[97],"rail-to-rail":[98],"output":[100],"mere":[103],"collection":[104],"3":[106],"transistors":[107],"+":[108],"1":[109],"sMTJ.":[110],"Furthermore,":[111],"simulations":[112],"also":[113],"confirm":[114],"P-Bit's":[116],"functionality":[117],"logic":[120],"circuits.":[121],"The":[122],"P-Bit":[126],"paves":[127],"way":[129],"towards":[130],"realizing":[131],"monolithic":[132],"large-scale":[133],"architecture":[136],"on":[137],"chips.":[139]},"counts_by_year":[],"updated_date":"2026-07-28T07:46:37.118299","created_date":"2026-04-09T00:00:00"}