{"id":"https://openalex.org/W7134935216","doi":"https://doi.org/10.48550/arxiv.2603.08719","title":"SiliconMind-V1: Multi-Agent Distillation and Debug-Reasoning Workflows for Verilog Code Generation","display_name":"SiliconMind-V1: Multi-Agent Distillation and Debug-Reasoning Workflows for Verilog Code Generation","publication_year":2026,"publication_date":"2026-02-10","ids":{"openalex":"https://openalex.org/W7134935216","doi":"https://doi.org/10.48550/arxiv.2603.08719"},"language":null,"primary_location":{"id":"doi:10.48550/arxiv.2603.08719","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2603.08719","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article"},"type":"preprint","indexed_in":["datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://doi.org/10.48550/arxiv.2603.08719","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029870143","display_name":"Mu-Chi Chen","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chen, Mu-Chi","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103367306","display_name":"Yu\u2010Hung Kao","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kao, Yu-Hung","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044258001","display_name":"Po-Hsuan Huang","orcid":"https://orcid.org/0000-0002-7458-9634"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Huang, Po-Hsuan","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5125079675","display_name":"Shao-Chun Ho","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ho, Shao-Chun","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5128799599","display_name":"Hsiang-Yu Tsou","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tsou, Hsiang-Yu","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5128770210","display_name":"I-Ting Wu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Wu, I-Ting","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067971879","display_name":"En-Ming Huang","orcid":"https://orcid.org/0000-0003-2196-2834"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Huang, En-Ming","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015437212","display_name":"Yukai Hung","orcid":"https://orcid.org/0009-0003-1889-1630"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hung, Yu-Kai","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5128755023","display_name":"Wei-Po Hsin","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hsin, Wei-Po","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5128714178","display_name":"Cheng Liang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Liang, Cheng","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012739047","display_name":"Chia-Heng Tu","orcid":"https://orcid.org/0000-0001-8967-1385"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tu, Chia-Heng","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020028710","display_name":"Shih\u2010Hao Hung","orcid":"https://orcid.org/0000-0003-2043-2663"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hung, Shih-Hao","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":null,"display_name":"Kung, H. T.","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kung, H. T.","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":13,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.29420000314712524,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.29420000314712524,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10181","display_name":"Natural Language Processing Techniques","score":0.07850000262260437,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10028","display_name":"Topic Modeling","score":0.07680000364780426,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.8690999746322632},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.6664999723434448},{"id":"https://openalex.org/keywords/workflow","display_name":"Workflow","score":0.5769000053405762},{"id":"https://openalex.org/keywords/code-generation","display_name":"Code generation","score":0.5688999891281128},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.49459999799728394},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.4875999987125397},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.32919999957084656},{"id":"https://openalex.org/keywords/program-analysis","display_name":"Program analysis","score":0.30880001187324524}],"concepts":[{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.8690999746322632},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8355000019073486},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.7350000143051147},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.6664999723434448},{"id":"https://openalex.org/C177212765","wikidata":"https://www.wikidata.org/wiki/Q627335","display_name":"Workflow","level":2,"score":0.5769000053405762},{"id":"https://openalex.org/C133162039","wikidata":"https://www.wikidata.org/wiki/Q1061077","display_name":"Code generation","level":3,"score":0.5688999891281128},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.49459999799728394},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.4875999987125397},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.3880999982357025},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.32919999957084656},{"id":"https://openalex.org/C98183937","wikidata":"https://www.wikidata.org/wiki/Q2112188","display_name":"Program analysis","level":2,"score":0.30880001187324524},{"id":"https://openalex.org/C43126263","wikidata":"https://www.wikidata.org/wiki/Q128751","display_name":"Source code","level":2,"score":0.30379998683929443},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.29269999265670776},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.2912999987602234},{"id":"https://openalex.org/C91071405","wikidata":"https://www.wikidata.org/wiki/Q1413145","display_name":"Program slicing","level":3,"score":0.2782999873161316},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.27709999680519104},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.273499995470047},{"id":"https://openalex.org/C97686452","wikidata":"https://www.wikidata.org/wiki/Q7604153","display_name":"Static analysis","level":2,"score":0.2689000070095062},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.2660999894142151},{"id":"https://openalex.org/C18762648","wikidata":"https://www.wikidata.org/wiki/Q42213","display_name":"Work (physics)","level":2,"score":0.26179999113082886},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.25850000977516174},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.2581999897956848},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.25450000166893005},{"id":"https://openalex.org/C111065885","wikidata":"https://www.wikidata.org/wiki/Q1189053","display_name":"Fuzz testing","level":3,"score":0.25380000472068787}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.48550/arxiv.2603.08719","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2603.08719","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"article"}],"best_oa_location":{"id":"doi:10.48550/arxiv.2603.08719","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2603.08719","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Large":[0],"language":[1],"models":[2,28],"(LLMs)":[3],"have":[4],"recently":[5],"emerged":[6],"as":[7],"a":[8,49],"promising":[9],"approach":[10,93],"for":[11,53],"automating":[12],"Verilog":[13],"code":[14],"generation;":[15],"however,":[16],"existing":[17],"methods":[18],"primarily":[19],"emphasize":[20],"syntactic":[21],"correctness":[22,100],"and":[23,40,71,87],"often":[24],"rely":[25],"on":[26,82],"commercial":[27],"or":[29],"external":[30],"verification":[31],"tools,":[32],"which":[33],"introduces":[34],"concerns":[35],"regarding":[36],"cost,":[37],"data":[38,56],"privacy,":[39],"limited":[41],"guarantees":[42],"of":[43],"functional":[44,99],"correctness.":[45],"This":[46],"work":[47],"proposes":[48],"unified":[50],"multi-agent":[51],"framework":[52],"reasoning-oriented":[54],"training":[55,104],"generation":[57],"with":[58],"integrated":[59],"testbench-driven":[60],"verification,":[61],"enabling":[62],"locally":[63],"fine-tuned":[64],"LLMs,":[65],"SiliconMind-V1,":[66],"to":[67],"iteratively":[68],"generate,":[69],"test,":[70],"debug":[72],"Register-Transfer":[73],"Level":[74],"(RTL)":[75],"designs":[76],"through":[77],"test-time":[78],"scaling.":[79],"Experimental":[80],"results":[81],"representative":[83],"benchmarks":[84],"(VerilogEval-v2,":[85],"RTLLM-v2,":[86],"CVDP)":[88],"demonstrate":[89],"that":[90],"the":[91,95],"proposed":[92],"outperforms":[94],"state-of-the-art":[96],"QiMeng-CodeV-R1":[97],"in":[98],"while":[101],"using":[102],"fewer":[103],"resources.":[105]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2026-03-12T00:00:00"}
