{"id":"https://openalex.org/W7130712874","doi":"https://doi.org/10.48550/arxiv.2602.17119","title":"A Data-Driven Dynamic Execution Orchestration Architecture","display_name":"A Data-Driven Dynamic Execution Orchestration Architecture","publication_year":2026,"publication_date":"2026-02-19","ids":{"openalex":"https://openalex.org/W7130712874","doi":"https://doi.org/10.48550/arxiv.2602.17119"},"language":null,"primary_location":{"id":"doi:10.48550/arxiv.2602.17119","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2602.17119","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article"},"type":"preprint","indexed_in":["datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://doi.org/10.48550/arxiv.2602.17119","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5126486253","display_name":"Zhenyu Bai","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Bai, Zhenyu","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5126524258","display_name":"Pranav Dangi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Dangi, Pranav","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066607195","display_name":"Rohan Juneja","orcid":"https://orcid.org/0000-0002-6015-1084"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Juneja, Rohan","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5126514995","display_name":"Zhaoying Li","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Li, Zhaoying","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5126499102","display_name":"Zhanglu Yan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yan, Zhanglu","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5126483488","display_name":"Huiying Lan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Lan, Huiying","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5126471490","display_name":"Tulika Mitra","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Mitra, Tulika","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5126486253"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.4296000003814697,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.4296000003814697,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.4074000120162964,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.051899999380111694,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.8780999779701233},{"id":"https://openalex.org/keywords/orchestration","display_name":"Orchestration","score":0.6765999794006348},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.6212999820709229},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5796999931335449},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.5400999784469604},{"id":"https://openalex.org/keywords/compile-time","display_name":"Compile time","score":0.5067999958992004},{"id":"https://openalex.org/keywords/control-flow","display_name":"Control flow","score":0.47200000286102295},{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.44839999079704285},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.41190001368522644}],"concepts":[{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.8780999779701233},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8460000157356262},{"id":"https://openalex.org/C199168358","wikidata":"https://www.wikidata.org/wiki/Q3367000","display_name":"Orchestration","level":3,"score":0.6765999794006348},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.6212999820709229},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5796999931335449},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.5400999784469604},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5259000062942505},{"id":"https://openalex.org/C200833197","wikidata":"https://www.wikidata.org/wiki/Q333707","display_name":"Compile time","level":3,"score":0.5067999958992004},{"id":"https://openalex.org/C160191386","wikidata":"https://www.wikidata.org/wiki/Q868299","display_name":"Control flow","level":2,"score":0.47200000286102295},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4593999981880188},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.44839999079704285},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.41190001368522644},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.37630000710487366},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.37599998712539673},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.3384999930858612},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32510000467300415},{"id":"https://openalex.org/C2776834041","wikidata":"https://www.wikidata.org/wiki/Q25346349","display_name":"Execution model","level":2,"score":0.31630000472068787},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.3061000108718872},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.29840001463890076},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.29679998755455017},{"id":"https://openalex.org/C67953723","wikidata":"https://www.wikidata.org/wiki/Q192525","display_name":"Workstation","level":2,"score":0.2904999852180481},{"id":"https://openalex.org/C176727019","wikidata":"https://www.wikidata.org/wiki/Q1172415","display_name":"Dataflow architecture","level":3,"score":0.2815999984741211},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.2809000015258789},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.27649998664855957},{"id":"https://openalex.org/C106515295","wikidata":"https://www.wikidata.org/wiki/Q26806595","display_name":"Parallel processing","level":2,"score":0.2581999897956848},{"id":"https://openalex.org/C76782552","wikidata":"https://www.wikidata.org/wiki/Q110546","display_name":"Just-in-time compilation","level":3,"score":0.2574000060558319},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.25200000405311584},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.25049999356269836}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.48550/arxiv.2602.17119","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2602.17119","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"article"}],"best_oa_location":{"id":"doi:10.48550/arxiv.2602.17119","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2602.17119","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Domain-specific":[0],"accelerators":[1,79],"deliver":[2],"exceptional":[3],"performance":[4,19,204],"on":[5,40,75],"their":[6],"target":[7],"workloads":[8],"through":[9,109],"fabrication-time":[10],"orchestrated":[11],"datapaths.":[12],"However,":[13],"such":[14],"specialized":[15,78,98,216],"architectures":[16,33,66],"often":[17],"exhibit":[18],"fragility":[20],"when":[21],"exposed":[22],"to":[23,43,135,215],"new":[24],"kernels":[25,210],"or":[26,58],"irregular":[27,57],"input":[28],"patterns.":[29],"In":[30],"contrast,":[31],"programmable":[32,65,123],"like":[34],"FPGAs,":[35],"CGRAs,":[36],"and":[37,73,99,106,141,208],"GPUs":[38],"rely":[39],"compile-time":[41],"orchestration":[42,120],"support":[44],"a":[45,90,116,156,166,175,190,223],"broader":[46],"range":[47],"of":[48,64,84,168,222],"applications;":[49],"but":[50],"they":[51],"are":[52,130,163],"typically":[53],"less":[54],"efficient":[55],"under":[56],"sparse":[59,146],"data.":[60],"Pushing":[61],"the":[62,82,95,220],"boundaries":[63],"requires":[67],"designs":[68],"that":[69,93,194,200],"can":[70],"achieve":[71],"efficiency":[72,213],"high-performance":[74],"par":[76],"with":[77],"while":[80,188,211],"retaining":[81,219],"agility":[83],"general-purpose":[85,224],"architectures.":[86,102],"We":[87],"introduce":[88],"Canon,":[89],"parallel":[91],"architecture":[92],"bridges":[94],"gap":[96],"between":[97],"general":[100],"purpose":[101],"Canon":[103,154,201],"exploits":[104],"data-level":[105],"instruction-level":[107],"parallelism":[108],"its":[110],"novel":[111,117],"design.":[112],"First,":[113],"it":[114],"employs":[115],"dynamic":[118,185],"data-driven":[119,209],"mechanism":[121],"using":[122],"Finite":[124],"State":[125],"Machines":[126],"(FSMs).":[127],"These":[128,179],"FSMs":[129],"programmed":[131],"at":[132,151],"compile":[133],"time":[134],"encode":[136],"high-level":[137],"dataflow":[138,193],"per":[139],"state":[140],"translate":[142],"incoming":[143],"meta-information":[144],"(e.g.,":[145],"coordinates)":[147],"into":[148],"control":[149,182],"instructions":[150,162],"runtime.":[152],"Second,":[153],"introduces":[155],"time-lapsed":[157],"SIMD":[158],"execution":[159],"in":[160],"which":[161],"issued":[164],"across":[165,205],"row":[167],"processing":[169],"elements":[170],"over":[171],"several":[172],"cycles,":[173],"creating":[174],"staggered":[176],"pipelined":[177],"execution.":[178],"innovations":[180],"amortize":[181],"overhead,":[183],"allowing":[184],"instruction":[186],"changes":[187],"constructing":[189],"continuously":[191],"evolving":[192],"maximizes":[195],"parallelism.":[196],"Experimental":[197],"evaluation":[198],"shows":[199],"delivers":[202],"high":[203],"diverse":[206],"data-agnostic":[207],"achieving":[212],"comparable":[214],"accelerators,":[217],"yet":[218],"flexibility":[221],"architecture.":[225]},"counts_by_year":[],"updated_date":"2026-02-21T06:16:09.471975","created_date":"2026-02-21T00:00:00"}