{"id":"https://openalex.org/W7124445964","doi":"https://doi.org/10.48550/arxiv.2601.10035","title":"A Compute and Communication Runtime Model for Loihi 2","display_name":"A Compute and Communication Runtime Model for Loihi 2","publication_year":2026,"publication_date":"2026-01-15","ids":{"openalex":"https://openalex.org/W7124445964","doi":"https://doi.org/10.48550/arxiv.2601.10035"},"language":null,"primary_location":{"id":"pmh:doi:10.48550/arxiv.2601.10035","is_oa":true,"landing_page_url":null,"pdf_url":null,"source":{"id":"https://openalex.org/S4406922384","display_name":"Open MIND","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"publisher-specific-oa","license_id":"https://openalex.org/licenses/publisher-specific-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Article"},"type":"preprint","indexed_in":["datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":null,"any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070646639","display_name":"Jonathan Timchek","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Timcheck, Jonathan","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":null,"display_name":"Pierro, Alessandro","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Pierro, Alessandro","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5123173503","display_name":"Sumit Bam Shrestha","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Shrestha, Sumit Bam","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5070646639"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.45829999446868896,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.45829999446868896,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.28769999742507935,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.10589999705553055,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.9133999943733215},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7419000267982483},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4986000061035156},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.37070000171661377},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.35740000009536743},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.33719998598098755},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.33329999446868896},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.3310000002384186}],"concepts":[{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.9133999943733215},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7768999934196472},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7419000267982483},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4986000061035156},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4359999895095825},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3833000063896179},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.37070000171661377},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.35740000009536743},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.33719998598098755},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3346000015735626},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.33329999446868896},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.3310000002384186},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.3255000114440918},{"id":"https://openalex.org/C129844170","wikidata":"https://www.wikidata.org/wiki/Q41299","display_name":"Quadratic equation","level":2,"score":0.3249000012874603},{"id":"https://openalex.org/C2776359362","wikidata":"https://www.wikidata.org/wiki/Q2145286","display_name":"Representation (politics)","level":3,"score":0.3246999979019165},{"id":"https://openalex.org/C170122806","wikidata":"https://www.wikidata.org/wiki/Q1914828","display_name":"Linear scale","level":2,"score":0.30160000920295715},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3005000054836273},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.29760000109672546},{"id":"https://openalex.org/C2776401178","wikidata":"https://www.wikidata.org/wiki/Q12050496","display_name":"Feature (linguistics)","level":2,"score":0.2856000065803528},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.2766000032424927},{"id":"https://openalex.org/C136197465","wikidata":"https://www.wikidata.org/wiki/Q1729295","display_name":"Variety (cybernetics)","level":2,"score":0.2655999958515167},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.25870001316070557},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.2506999969482422}],"mesh":[],"locations_count":2,"locations":[{"id":"pmh:doi:10.48550/arxiv.2601.10035","is_oa":true,"landing_page_url":null,"pdf_url":null,"source":{"id":"https://openalex.org/S4406922384","display_name":"Open MIND","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"publisher-specific-oa","license_id":"https://openalex.org/licenses/publisher-specific-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Article"},{"id":"doi:10.48550/arxiv.2601.10035","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2601.10035","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"article"}],"best_oa_location":{"id":"pmh:doi:10.48550/arxiv.2601.10035","is_oa":true,"landing_page_url":null,"pdf_url":null,"source":{"id":"https://openalex.org/S4406922384","display_name":"Open MIND","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"publisher-specific-oa","license_id":"https://openalex.org/licenses/publisher-specific-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Neuromorphic":[0],"computers":[1],"hold":[2],"the":[3,8,64,84,106,163,201,234],"potential":[4],"to":[5,38,56,155,197,215],"vastly":[6],"improve":[7],"speed":[9],"and":[10,26,52,60,130,162,178,239],"efficiency":[11],"of":[12,16,68,136,200,225,236],"a":[13,48,73,98,113,134,140,145,170,183,223],"wide":[14],"range":[15],"computational":[17],"kernels":[18,240],"with":[19,213,222],"their":[20],"asynchronous,":[21],"compute-memory":[22],"co-located,":[23],"spatially":[24],"distributed,":[25],"scalable":[27],"nature.":[28],"However,":[29],"performance":[30],"models":[31],"that":[32,124],"are":[33,45],"simple":[34],"yet":[35],"sufficiently":[36],"expressive":[37],"predict":[39],"runtime":[40,110,161,165,196,217,230],"on":[41,133,166],"actual":[42],"neuromorphic":[43,75,122],"hardware":[44],"lacking,":[46],"posing":[47],"challenge":[49],"for":[50,118,127,169,179,194,208,241],"researchers":[51],"developers":[53],"who":[54],"strive":[55],"design":[57,235],"fast":[58],"algorithms":[59,238],"kernels.":[61],"As":[62],"breaking":[63],"memory":[65],"bandwidth":[66],"wall":[67],"conventional":[69],"von-Neumann":[70],"architectures":[71],"is":[72,80,90],"primary":[74],"advantage,":[76],"modeling":[77,87],"communication":[78,88,131],"time":[79,89],"especially":[81],"important.":[82],"At":[83],"same":[85],"time,":[86],"difficult,":[91],"as":[92],"complex":[93],"congestion":[94],"patterns":[95],"arise":[96],"in":[97,219],"heavily-loaded":[99],"Network-on-Chip.":[100],"In":[101],"this":[102],"work,":[103],"we":[104,143,190],"introduce":[105],"first":[107],"max-affine":[108,229],"lower-bound":[109,141],"model":[111,116,231],"--":[112,117],"multi-dimensional":[114],"roofline":[115],"Intel's":[119],"Loihi":[120,167,242],"2":[121,168],"chip":[123],"quantitatively":[125],"accounts":[126],"both":[128],"compute":[129],"based":[132],"suite":[135],"microbenchmarks.":[137],"Despite":[138],"being":[139],"model,":[142],"observe":[144],"tight":[146],"correspondence":[147],"(Pearson":[148],"correlation":[149],"coefficient":[150],"greater":[151],"than":[152],"or":[153],"equal":[154],"0.97)":[156],"between":[157],"our":[158],"model's":[159],"estimated":[160],"measured":[164],"neural":[171],"network":[172],"linear":[173,202,214],"layer,":[174,203],"i.e.,":[175],"matrix-vector":[176],"multiplication,":[177],"an":[180,205],"example":[181],"application,":[182],"Quadratic":[184],"Unconstrained":[185],"Binary":[186],"Optimization":[187],"solver.":[188],"Furthermore,":[189],"derive":[191],"analytical":[192],"expressions":[193],"communication-bottlenecked":[195],"study":[198],"scalability":[199],"revealing":[204],"area-runtime":[206],"tradeoff":[207],"different":[209],"spatial":[210],"workload":[211],"configurations":[212],"superlinear":[216],"scaling":[218],"layer":[220],"size":[221],"variety":[224],"constant":[226],"factors.":[227],"Our":[228],"helps":[232],"empower":[233],"high-speed":[237],"2.":[243]},"counts_by_year":[],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2026-01-17T00:00:00"}