{"id":"https://openalex.org/W7117309118","doi":"https://doi.org/10.48550/arxiv.2512.20808","title":"Hardware-Algorithm Co-Design for Hyperdimensional Computing Based on Memristive System-on-Chip","display_name":"Hardware-Algorithm Co-Design for Hyperdimensional Computing Based on Memristive System-on-Chip","publication_year":2025,"publication_date":"2025-12-23","ids":{"openalex":"https://openalex.org/W7117309118","doi":"https://doi.org/10.48550/arxiv.2512.20808"},"language":null,"primary_location":{"id":"doi:10.48550/arxiv.2512.20808","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2512.20808","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Preprint"},"type":"preprint","indexed_in":["datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://doi.org/10.48550/arxiv.2512.20808","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5121345086","display_name":"Yi Huang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Huang, Yi","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5121328240","display_name":"Alireza Jaberi Rad","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Rad, Alireza Jaberi","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5044224050","display_name":"Qiangfei Xia","orcid":"https://orcid.org/0000-0003-1436-8423"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xia, Qiangfei","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.7383000254631042,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.7383000254631042,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.19859999418258667,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12611","display_name":"Neural Networks and Reservoir Computing","score":0.03620000183582306,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.698199987411499},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.6161999702453613},{"id":"https://openalex.org/keywords/randomness","display_name":"Randomness","score":0.579200029373169},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.5209000110626221},{"id":"https://openalex.org/keywords/complement","display_name":"Complement (music)","score":0.48660001158714294},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.4311999976634979},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.42719998955726624}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7310000061988831},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.698199987411499},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.6161999702453613},{"id":"https://openalex.org/C125112378","wikidata":"https://www.wikidata.org/wiki/Q176640","display_name":"Randomness","level":2,"score":0.579200029373169},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.5209000110626221},{"id":"https://openalex.org/C112313634","wikidata":"https://www.wikidata.org/wiki/Q7886648","display_name":"Complement (music)","level":5,"score":0.48660001158714294},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.4311999976634979},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.42719998955726624},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.42660000920295715},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.41929998993873596},{"id":"https://openalex.org/C157170001","wikidata":"https://www.wikidata.org/wiki/Q4781507","display_name":"Applications of artificial intelligence","level":2,"score":0.41600000858306885},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3716999888420105},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3531999886035919},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.35019999742507935},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.3294000029563904},{"id":"https://openalex.org/C138236772","wikidata":"https://www.wikidata.org/wiki/Q25098575","display_name":"Edge device","level":3,"score":0.3203999996185303},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.2890999913215637},{"id":"https://openalex.org/C106515295","wikidata":"https://www.wikidata.org/wiki/Q26806595","display_name":"Parallel processing","level":2,"score":0.28760001063346863},{"id":"https://openalex.org/C2778456923","wikidata":"https://www.wikidata.org/wiki/Q5337692","display_name":"Edge computing","level":3,"score":0.28619998693466187},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.28130000829696655},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2669999897480011},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.26669999957084656},{"id":"https://openalex.org/C557945733","wikidata":"https://www.wikidata.org/wiki/Q389772","display_name":"Data transmission","level":2,"score":0.2547000050544739}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.48550/arxiv.2512.20808","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2512.20808","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"Preprint"}],"best_oa_location":{"id":"doi:10.48550/arxiv.2512.20808","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2512.20808","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Preprint"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Hyperdimensional":[0],"computing":[1,6,26],"(HDC),":[2],"utilizing":[3],"a":[4,54,62],"parallel":[5],"paradigm":[7],"and":[8,49,81],"efficient":[9],"learning":[10],"algorithm,":[11],"is":[12],"well-suited":[13],"for":[14,58,79,85,129],"resource-constrained":[15],"artificial":[16],"intelligence":[17],"(AI)":[18],"applications,":[19],"such":[20],"as":[21],"in":[22,113,118],"edge":[23,135],"devices.":[24,136],"In-memory":[25],"(IMC)":[27],"systems":[28],"based":[29],"on":[30,61,134],"memristive":[31,46,63,76,109],"devices":[32],"complement":[33],"this":[34],"by":[35],"offering":[36],"energy-efficient":[37,131],"hardware":[38,48,68,114],"solutions.":[39],"To":[40],"harness":[41],"the":[42,67,72,88,104,108,119,124],"advantages":[43],"of":[44,75,126],"both":[45],"IMC":[47,84],"HDC":[50,60],"algorithms,":[51],"we":[52,70,91],"propose":[53],"hardware-algorithm":[55],"co-design":[56],"approach":[57,128],"implementing":[59],"System-on-Chip":[64],"(SoC).":[65],"On":[66],"side,":[69],"utilize":[71],"inherent":[73],"randomness":[74],"crossbar":[77],"arrays":[78],"encoding":[80,94],"employ":[82],"analog":[83],"classification.":[86],"At":[87],"algorithm":[89],"level,":[90],"develop":[92],"hardware-aware":[93],"techniques":[95],"that":[96],"map":[97],"data":[98],"features":[99],"into":[100],"hyperdimensional":[101],"vectors,":[102],"optimizing":[103],"classification":[105,121],"process":[106],"within":[107],"SoC.":[110],"Experimental":[111],"results":[112],"demonstrate":[115],"90.71%":[116],"accuracy":[117],"language":[120],"task,":[122],"highlighting":[123],"potential":[125],"our":[127],"achieving":[130],"AI":[132],"deployments":[133]},"counts_by_year":[],"updated_date":"2026-07-01T06:00:48.157686","created_date":"2025-12-26T00:00:00"}