{"id":"https://openalex.org/W4392742552","doi":"https://doi.org/10.46586/tches.v2024.i2.252-275","title":"Nibbling MAYO: Optimized Implementations for AVX2 and Cortex-M4","display_name":"Nibbling MAYO: Optimized Implementations for AVX2 and Cortex-M4","publication_year":2024,"publication_date":"2024-03-12","ids":{"openalex":"https://openalex.org/W4392742552","doi":"https://doi.org/10.46586/tches.v2024.i2.252-275"},"language":"en","primary_location":{"id":"doi:10.46586/tches.v2024.i2.252-275","is_oa":true,"landing_page_url":"https://doi.org/10.46586/tches.v2024.i2.252-275","pdf_url":"https://tches.iacr.org/index.php/TCHES/article/download/11427/10933","source":{"id":"https://openalex.org/S4210207404","display_name":"IACR Transactions on Cryptographic Hardware and Embedded Systems","issn_l":"2569-2925","issn":["2569-2925"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IACR Transactions on Cryptographic Hardware and Embedded Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://tches.iacr.org/index.php/TCHES/article/download/11427/10933","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065941145","display_name":"Ward Beullens","orcid":"https://orcid.org/0000-0003-0888-283X"},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Ward Beullens","raw_affiliation_strings":["IBM Research Europe, Zurich, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research Europe, Zurich, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103274096","display_name":"F\u00e1bio Campos","orcid":"https://orcid.org/0000-0003-3912-7570"},"institutions":[{"id":"https://openalex.org/I4829542","display_name":"RheinMain University of Applied Sciences","ror":"https://ror.org/0378gm372","country_code":"DE","type":"education","lineage":["https://openalex.org/I4829542"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Fabio Campos","raw_affiliation_strings":["RheinMain University of Applied Sciences, Wiesbaden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"RheinMain University of Applied Sciences, Wiesbaden, Germany","institution_ids":["https://openalex.org/I4829542"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022218874","display_name":"Sof\u00eda Celi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sof\u00eda Celi","raw_affiliation_strings":["Brave Software, San Francisco, California"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Brave Software, San Francisco, California","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113140539","display_name":"B.A. Hess","orcid":null},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Basil Hess","raw_affiliation_strings":["IBM Research Europe, Zurich, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research Europe, Zurich, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066102840","display_name":"Matthias J. Kannwischer","orcid":"https://orcid.org/0000-0002-8215-4729"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Matthias J. Kannwischer","raw_affiliation_strings":["Quantum Safe Migration Center, Chelpis Quantum Tech, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Quantum Safe Migration Center, Chelpis Quantum Tech, Taipei, Taiwan","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.7308,"has_fulltext":true,"cited_by_count":10,"citation_normalized_percentile":{"value":0.84014999,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":98,"max":99},"biblio":{"volume":"2024","issue":"2","first_page":"252","last_page":"275"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.8532999753952026,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.8532999753952026,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.8061000108718872,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.7102727890014648},{"id":"https://openalex.org/keywords/cortex","display_name":"Cortex (anatomy)","score":0.6322723627090454},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4920596480369568},{"id":"https://openalex.org/keywords/neuroscience","display_name":"Neuroscience","score":0.392935186624527},{"id":"https://openalex.org/keywords/psychology","display_name":"Psychology","score":0.36032813787460327},{"id":"https://openalex.org/keywords/cognitive-science","display_name":"Cognitive science","score":0.325743168592453},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.22255423665046692}],"concepts":[{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.7102727890014648},{"id":"https://openalex.org/C2777348757","wikidata":"https://www.wikidata.org/wiki/Q2346577","display_name":"Cortex (anatomy)","level":2,"score":0.6322723627090454},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4920596480369568},{"id":"https://openalex.org/C169760540","wikidata":"https://www.wikidata.org/wiki/Q207011","display_name":"Neuroscience","level":1,"score":0.392935186624527},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.36032813787460327},{"id":"https://openalex.org/C188147891","wikidata":"https://www.wikidata.org/wiki/Q147638","display_name":"Cognitive science","level":1,"score":0.325743168592453},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.22255423665046692}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.46586/tches.v2024.i2.252-275","is_oa":true,"landing_page_url":"https://doi.org/10.46586/tches.v2024.i2.252-275","pdf_url":"https://tches.iacr.org/index.php/TCHES/article/download/11427/10933","source":{"id":"https://openalex.org/S4210207404","display_name":"IACR Transactions on Cryptographic Hardware and Embedded Systems","issn_l":"2569-2925","issn":["2569-2925"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IACR Transactions on Cryptographic Hardware and Embedded Systems","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:33c277bf61a74fc4a5f503520d1aaf31","is_oa":false,"landing_page_url":"https://doaj.org/article/33c277bf61a74fc4a5f503520d1aaf31","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Transactions on Cryptographic Hardware and Embedded Systems, Vol 2024, Iss 2 (2024)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.46586/tches.v2024.i2.252-275","is_oa":true,"landing_page_url":"https://doi.org/10.46586/tches.v2024.i2.252-275","pdf_url":"https://tches.iacr.org/index.php/TCHES/article/download/11427/10933","source":{"id":"https://openalex.org/S4210207404","display_name":"IACR Transactions on Cryptographic Hardware and Embedded Systems","issn_l":"2569-2925","issn":["2569-2925"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IACR Transactions on Cryptographic Hardware and Embedded Systems","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G2041635355","display_name":null,"funder_award_id":"AS-IA-109-M01","funder_id":"https://openalex.org/F4320321041","funder_display_name":"Academia Sinica"},{"id":"https://openalex.org/G8527195007","display_name":null,"funder_award_id":"AS-KPQ-109-DSTCP","funder_id":"https://openalex.org/F4320321041","funder_display_name":"Academia Sinica"}],"funders":[{"id":"https://openalex.org/F4320321041","display_name":"Academia Sinica","ror":"https://ror.org/05bxb3784"}],"has_content":{"grobid_xml":false,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4392742552.pdf"},"referenced_works_count":14,"referenced_works":["https://openalex.org/W1576359684","https://openalex.org/W1628272610","https://openalex.org/W1655990431","https://openalex.org/W2128968394","https://openalex.org/W2574539584","https://openalex.org/W2767399671","https://openalex.org/W2914442384","https://openalex.org/W2914999860","https://openalex.org/W2970276809","https://openalex.org/W3028997425","https://openalex.org/W3202809527","https://openalex.org/W4283644776","https://openalex.org/W4285302767","https://openalex.org/W4380080894"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2120447654","https://openalex.org/W2977179488","https://openalex.org/W2144453115","https://openalex.org/W2128223750","https://openalex.org/W4238532390","https://openalex.org/W2188872161","https://openalex.org/W2961779879","https://openalex.org/W797688974","https://openalex.org/W2002978035"],"abstract_inverted_index":{"MAYO":[0,37,63,117,182],"is":[1,60,96,183],"a":[2,71,77,193],"popular":[3],"high-calorie":[4],"condiment":[5],"as":[6,8],"well":[7],"an":[9],"auspicious":[10],"candidate":[11],"in":[12,141,151],"the":[13,39,50,54,81,112,119,122,136,149,157],"ongoing":[14],"NIST":[15],"competition":[16],"for":[17,99],"additional":[18],"post-quantum":[19],"signature":[20,24,187,200],"schemes":[21,188,201],"achieving":[22,100],"competitive":[23,184],"and":[25,41,49,171,174,192],"public":[26],"key":[27,172],"sizes.":[28],"In":[29],"this":[30],"work,":[31],"we":[32,92,107],"present":[33],"high-speed":[34],"implementations":[35],"of":[36,57,74,116,121,195],"using":[38,118,135,161],"AVX2":[40],"Armv7E-M":[42],"instruction":[43],"sets":[44],"targeting":[45],"recent":[46],"x86":[47,190],"platforms":[48],"Arm":[51],"Cortex-M4.":[52,104],"Moreover,":[53],"main":[55],"contribution":[56],"our":[58],"work":[59],"showing":[61],"that":[62,94,181],"can":[64,205],"be":[65,207],"even":[66],"faster":[67,88,145,160],"when":[68,134],"switching":[69],"from":[70],"bitsliced":[72,82,137],"representation":[73,83,152],"keys":[75],"to":[76,110,129,143,155,167],"nibble-sliced":[78],"representation.":[79],"While":[80],"was":[84],"primarily":[85],"motivated":[86],"by":[87],"arithmetic":[89,158],"on":[90,103,189,202],"microcontrollers,":[91],"show":[93],"it":[95],"not":[97],"necessary":[98],"high":[101],"performance":[102,132],"On":[105],"Cortex-M4,":[106],"instead":[108],"propose":[109],"implement":[111,156],"large":[113],"matrix":[114],"multiplications":[115],"Method":[120],"Four":[123],"Russians":[124],"(M4R),":[125],"which":[126],"allows":[127,153],"us":[128,154],"achieve":[130],"better":[131],"than":[133,198],"approach.":[138],"This":[139,179],"results":[140],"up":[142,166],"21%":[144],"signing.":[146],"For":[147],"AVX2,":[148],"change":[150],"much":[159],"shuffle":[162],"instructions.":[163],"Signing":[164],"takes":[165],"3.2x":[168],"fewer":[169],"cycles":[170],"generation":[173],"verification":[175],"enjoy":[176],"similar":[177],"speedups.":[178],"shows":[180],"with":[185],"lattice-based":[186,199],"CPUs,":[191],"factor":[194],"2-6":[196],"slower":[197],"Cortex-M4":[203],"(which":[204],"still":[206],"considered":[208],"competitive).":[209]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":7}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
