{"id":"https://openalex.org/W1997687101","doi":"https://doi.org/10.4304/jnw.9.11.3143-3150","title":"System Design for Real-time Image Processing Based on Multi-core DSP","display_name":"System Design for Real-time Image Processing Based on Multi-core DSP","publication_year":1969,"publication_date":"1969-12-31","ids":{"openalex":"https://openalex.org/W1997687101","doi":"https://doi.org/10.4304/jnw.9.11.3143-3150","mag":"1997687101"},"language":"en","primary_location":{"id":"doi:10.4304/jnw.9.11.3143-3150","is_oa":false,"landing_page_url":"https://doi.org/10.4304/jnw.9.11.3143-3150","pdf_url":null,"source":{"id":"https://openalex.org/S189188848","display_name":"Journal of Networks","issn_l":"1796-2056","issn":["1796-2056"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310318660","host_organization_name":"Academy Publisher","host_organization_lineage":["https://openalex.org/P4310318660"],"host_organization_lineage_names":["Academy Publisher"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Networks","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043952974","display_name":"Yuanfang Xin","orcid":"https://orcid.org/0000-0002-2947-263X"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Yuanfang Xin","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5101048013","display_name":"Xia Sun","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xia Sun","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5043952974"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.14799401,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"9","issue":"11","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.8531000018119812,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.8531000018119812,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.8080000281333923,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.7975000143051147,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9140313863754272},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.7173581123352051},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.525926411151886},{"id":"https://openalex.org/keywords/real-time-operating-system","display_name":"Real-time operating system","score":0.4268389940261841},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41623276472091675},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.40664657950401306},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.3655296564102173},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3448154628276825},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.31379586458206177}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9140313863754272},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.7173581123352051},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.525926411151886},{"id":"https://openalex.org/C28472234","wikidata":"https://www.wikidata.org/wiki/Q213666","display_name":"Real-time operating system","level":2,"score":0.4268389940261841},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41623276472091675},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.40664657950401306},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.3655296564102173},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3448154628276825},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.31379586458206177}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.4304/jnw.9.11.3143-3150","is_oa":false,"landing_page_url":"https://doi.org/10.4304/jnw.9.11.3143-3150","pdf_url":null,"source":{"id":"https://openalex.org/S189188848","display_name":"Journal of Networks","issn_l":"1796-2056","issn":["1796-2056"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310318660","host_organization_name":"Academy Publisher","host_organization_lineage":["https://openalex.org/P4310318660"],"host_organization_lineage_names":["Academy Publisher"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Networks","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.4000000059604645}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2357443734"],"related_works":["https://openalex.org/W2390348052","https://openalex.org/W2371310357","https://openalex.org/W2356859146","https://openalex.org/W2373039468","https://openalex.org/W1966102218","https://openalex.org/W2373664848","https://openalex.org/W2387078853","https://openalex.org/W2374455716","https://openalex.org/W2386377916","https://openalex.org/W2363990172"],"abstract_inverted_index":{"In":[0,96],"the":[1,8,19,31,40,49,58,76,84,87,100,105,110,117,121,125,138,148,158,161,169,178,188,196,200],"process":[2],"of":[3,10,21,33,89,104,131,143,171,180,190,202],"real":[4,133,203],"time":[5,134,204],"image":[6,11,35,46,132,145,150,173,192,205],"processing,":[7,193],"amount":[9],"processing":[12,47,135,151,174,206],"computing":[13],"and":[14,61,70,80,83,92,102,123,127,140,177],"data":[15,68,77,81],"is":[16,51,175,183],"very":[17],"large,":[18],"use":[20],"single":[22,26],"core":[23,59],"or":[24],"a":[25,52],"DSP":[27,44,56],"can":[28,154,165,186],"not":[29],"meet":[30],"needs":[32],"real-time":[34,45,144,172,191],"processing.":[36,146],"This":[37],"paper":[38,108],"designs":[39],"new":[41],"generation":[42],"multi-core":[43,53],"system,":[48,106,122],"system":[50,85,149,207],"high":[54,93],"performance":[55,152],"as":[57],"circuit,":[60],"also":[62],"uses":[63,109],"FPGA":[64],"counterweight":[65],"device,":[66],"high-speed":[67,71],"interface":[69],"external":[72],"memory,":[73],"to":[74,98,114,136,194],"improve":[75],"cache":[78],"speed":[79,170],"bandwidth,":[82],"satisfies":[86],"design":[88,201],"low":[90],"loss":[91],"computational":[94],"performance.":[95],"order":[97],"verify":[99],"validity":[101],"reliability":[103],"this":[107],"Hyper":[111],"Lynx":[112],"software":[113],"carry":[115],"on":[116],"simulation":[118,162],"test":[119,163],"for":[120,199],"sets":[124],"IP":[126],"sub":[128],"net":[129],"mask":[130],"obtain":[137],"eye":[139],"timing":[141],"diagram":[142],"Finally,":[147],"results":[153,164],"be":[155,166],"obtained":[156],"by":[157],"joint":[159],"debugging,":[160],"seen":[167],"that":[168],"quick,":[176],"rate":[179],"correct":[181],"recognition":[182],"high,":[184],"which":[185],"satisfy":[187],"need":[189],"provide":[195],"technical":[197],"reference":[198]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
