{"id":"https://openalex.org/W2339182809","doi":"https://doi.org/10.4018/ijmstr.2015040105","title":"Design and Performance Evaluation of the SCAN Secure Processor","display_name":"Design and Performance Evaluation of the SCAN Secure Processor","publication_year":2015,"publication_date":"2015-04-01","ids":{"openalex":"https://openalex.org/W2339182809","doi":"https://doi.org/10.4018/ijmstr.2015040105","mag":"2339182809"},"language":"en","primary_location":{"id":"doi:10.4018/ijmstr.2015040105","is_oa":false,"landing_page_url":"https://doi.org/10.4018/ijmstr.2015040105","pdf_url":null,"source":{"id":"https://openalex.org/S4210228540","display_name":"International Journal of Monitoring and Surveillance Technologies Research","issn_l":"2166-7241","issn":["2166-7241","2166-725X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320424","host_organization_name":"IGI Global","host_organization_lineage":["https://openalex.org/P4310320424"],"host_organization_lineage_names":["IGI Global"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Monitoring and Surveillance Technologies Research","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066196278","display_name":"Raghudeep Kannavara","orcid":"https://orcid.org/0000-0002-0043-9430"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Raghudeep Kannavara","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025446324","display_name":"Nikolaos Bourbakis","orcid":"https://orcid.org/0000-0003-1507-614X"},"institutions":[{"id":"https://openalex.org/I19648265","display_name":"Wright State University","ror":"https://ror.org/04qk6pt94","country_code":"US","type":"education","lineage":["https://openalex.org/I19648265"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nikolaos Bourbakis","raw_affiliation_strings":["Assistive Technologies Research Center, Wright State University, Dayton, OH, USA"],"affiliations":[{"raw_affiliation_string":"Assistive Technologies Research Center, Wright State University, Dayton, OH, USA","institution_ids":["https://openalex.org/I19648265"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5066196278"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.18223845,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"3","issue":"2","first_page":"68","last_page":"91"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8203564882278442},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.6319658756256104},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.5330411791801453},{"id":"https://openalex.org/keywords/processor-design","display_name":"Processor design","score":0.5005073547363281},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4957443177700043},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4929189682006836},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47042226791381836},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.45885801315307617},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.45846235752105713},{"id":"https://openalex.org/keywords/application-specific-instruction-set-processor","display_name":"Application-specific instruction-set processor","score":0.4338739514350891},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4301599860191345},{"id":"https://openalex.org/keywords/lossless-compression","display_name":"Lossless compression","score":0.41176027059555054},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3929747939109802},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3604121208190918},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.3531549572944641},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.24801605939865112},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16973420977592468},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.11462393403053284}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8203564882278442},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.6319658756256104},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.5330411791801453},{"id":"https://openalex.org/C526435321","wikidata":"https://www.wikidata.org/wiki/Q1303814","display_name":"Processor design","level":2,"score":0.5005073547363281},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4957443177700043},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4929189682006836},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47042226791381836},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.45885801315307617},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.45846235752105713},{"id":"https://openalex.org/C201736964","wikidata":"https://www.wikidata.org/wiki/Q621583","display_name":"Application-specific instruction-set processor","level":3,"score":0.4338739514350891},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4301599860191345},{"id":"https://openalex.org/C81081738","wikidata":"https://www.wikidata.org/wiki/Q55542","display_name":"Lossless compression","level":3,"score":0.41176027059555054},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3929747939109802},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3604121208190918},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.3531549572944641},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.24801605939865112},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16973420977592468},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.11462393403053284},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.4018/ijmstr.2015040105","is_oa":false,"landing_page_url":"https://doi.org/10.4018/ijmstr.2015040105","pdf_url":null,"source":{"id":"https://openalex.org/S4210228540","display_name":"International Journal of Monitoring and Surveillance Technologies Research","issn_l":"2166-7241","issn":["2166-7241","2166-725X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320424","host_organization_name":"IGI Global","host_organization_lineage":["https://openalex.org/P4310320424"],"host_organization_lineage_names":["IGI Global"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Monitoring and Surveillance Technologies Research","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.44999998807907104,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W20826369","https://openalex.org/W66036557","https://openalex.org/W1481782694","https://openalex.org/W1528819340","https://openalex.org/W1530613379","https://openalex.org/W1531368375","https://openalex.org/W1878766038","https://openalex.org/W1914543196","https://openalex.org/W1972432770","https://openalex.org/W1977311615","https://openalex.org/W1982484305","https://openalex.org/W1992265210","https://openalex.org/W2012215713","https://openalex.org/W2065207200","https://openalex.org/W2076415323","https://openalex.org/W2101778660","https://openalex.org/W2107270529","https://openalex.org/W2111545894","https://openalex.org/W2118952565","https://openalex.org/W2120852247","https://openalex.org/W2124314659","https://openalex.org/W2134623309","https://openalex.org/W2165961102","https://openalex.org/W2554498172"],"related_works":["https://openalex.org/W2036206036","https://openalex.org/W3002622661","https://openalex.org/W2139112224","https://openalex.org/W2539200741","https://openalex.org/W37150954","https://openalex.org/W4367172762","https://openalex.org/W2551798393","https://openalex.org/W2125485192","https://openalex.org/W1570677834","https://openalex.org/W2883183116"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,10,17,72],"design,":[4],"performance":[5],"analysis,":[6],"security":[7,25],"evaluation":[8],"and":[9,47,85],"extended":[11,32],"instruction":[12,69],"set":[13],"architecture":[14,29,76],"(ISA)":[15],"of":[16,65],"SCAN":[18,52,58],"secure":[19,61,74],"processor":[20,28,75],"(SCAN-SP).":[21],"The":[22],"SCAN-SP":[23,55],"is":[24],"enhanced":[26],"SparcV8":[27],"with":[30,36,83],"an":[31,37,67],"ISA":[33],"to":[34,41],"interface":[35],"off-chip":[38],"FPGA":[39],"co-processor":[40],"handle":[42],"lossless":[43],"image":[44],"compression,":[45],"encryption":[46],"information":[48],"hiding":[49],"based":[50,60],"on":[51],"methodology.":[53],"Additionally,":[54],"offers":[56],"a":[57],"methodology":[59],"computing":[62,87],"feature":[63],"capable":[64],"executing":[66],"encrypted":[68],"stream.":[70],"Thus":[71],"proposed":[73],"enables":[77],"tamper":[78],"resistant":[79],"code":[80],"execution":[81],"along":[82],"cryptographic":[84],"general":[86],"capabilities.":[88]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
