{"id":"https://openalex.org/W3046089483","doi":"https://doi.org/10.3906/elk-1910-16","title":"Sketic: a machine learning-based digital circuit recognition platform","display_name":"Sketic: a machine learning-based digital circuit recognition platform","publication_year":2020,"publication_date":"2020-02-11","ids":{"openalex":"https://openalex.org/W3046089483","doi":"https://doi.org/10.3906/elk-1910-16","mag":"3046089483"},"language":"en","primary_location":{"id":"doi:10.3906/elk-1910-16","is_oa":false,"landing_page_url":"https://doi.org/10.3906/elk-1910-16","pdf_url":null,"source":{"id":"https://openalex.org/S32837994","display_name":"TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES","issn_l":"1300-0632","issn":["1300-0632","1303-6203"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310318422","host_organization_name":"Scientific and Technological Research Council of Turkey (TUBITAK)","host_organization_lineage":["https://openalex.org/P4310318422"],"host_organization_lineage_names":["Scientific and Technological Research Council of Turkey (TUBITAK)"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051502689","display_name":"Mohammad Abdel-Majeed","orcid":"https://orcid.org/0000-0002-0789-4479"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Mohammad ABDEL-MAJEED","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036214117","display_name":"Tasneem ALMOUSA","orcid":"https://orcid.org/0000-0002-8388-5531"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tasneem ALMOUSA","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046210461","display_name":"Maysaa ALSALMAN","orcid":"https://orcid.org/0000-0002-4128-0841"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Maysaa ALSALMAN","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5053636909","display_name":"Abeer YOSF","orcid":"https://orcid.org/0000-0003-0069-0059"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Abeer YOSF","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5051502689"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4148,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.61365294,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"28","issue":"4","first_page":"2030","last_page":"2045"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/schematic","display_name":"Schematic","score":0.7675343751907349},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.755872368812561},{"id":"https://openalex.org/keywords/circuit-diagram","display_name":"Circuit diagram","score":0.627677321434021},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.6232230067253113},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.56303870677948},{"id":"https://openalex.org/keywords/construct","display_name":"Construct (python library)","score":0.5537741780281067},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4920370280742645},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.4717313349246979},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4484194219112396},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.4304009974002838},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.42745786905288696},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.39549916982650757},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3901059329509735},{"id":"https://openalex.org/keywords/engineering-drawing","display_name":"Engineering drawing","score":0.38304388523101807},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3634650707244873},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.35258787870407104},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.34598779678344727},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.30176979303359985},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2530890107154846},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.25273454189300537},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.24081960320472717},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14480116963386536},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1427626609802246},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13967576622962952}],"concepts":[{"id":"https://openalex.org/C192328126","wikidata":"https://www.wikidata.org/wiki/Q4514647","display_name":"Schematic","level":2,"score":0.7675343751907349},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.755872368812561},{"id":"https://openalex.org/C39799792","wikidata":"https://www.wikidata.org/wiki/Q1045991","display_name":"Circuit diagram","level":2,"score":0.627677321434021},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.6232230067253113},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.56303870677948},{"id":"https://openalex.org/C2780801425","wikidata":"https://www.wikidata.org/wiki/Q5164392","display_name":"Construct (python library)","level":2,"score":0.5537741780281067},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4920370280742645},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.4717313349246979},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4484194219112396},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.4304009974002838},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.42745786905288696},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.39549916982650757},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3901059329509735},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.38304388523101807},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3634650707244873},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.35258787870407104},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.34598779678344727},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.30176979303359985},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2530890107154846},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.25273454189300537},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.24081960320472717},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14480116963386536},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1427626609802246},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13967576622962952},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.3906/elk-1910-16","is_oa":false,"landing_page_url":"https://doi.org/10.3906/elk-1910-16","pdf_url":null,"source":{"id":"https://openalex.org/S32837994","display_name":"TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES","issn_l":"1300-0632","issn":["1300-0632","1303-6203"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310318422","host_organization_name":"Scientific and Technological Research Council of Turkey (TUBITAK)","host_organization_lineage":["https://openalex.org/P4310318422"],"host_organization_lineage_names":["Scientific and Technological Research Council of Turkey (TUBITAK)"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2377041390","https://openalex.org/W2136813515","https://openalex.org/W2351310008","https://openalex.org/W2349227977","https://openalex.org/W2121232025","https://openalex.org/W2381073067","https://openalex.org/W2348265766","https://openalex.org/W2323631888","https://openalex.org/W2247415108","https://openalex.org/W2051008800"],"abstract_inverted_index":{"In":[0],"digital":[1,4,173,216],"system":[2,196,206],"design,":[3],"logic":[5,18,154],"circuit":[6,37,67,217],"diagrams":[7,22],"are":[8,58,80],"built":[9],"using":[10,23,60],"interconnects":[11],"and":[12,68,97,113,123,140,160,186,199],"symbolic":[13],"representations":[14],"of":[15,54,88,107,119],"the":[16,27,31,36,50,55,65,86,94,105,138,141,168,182,194,212,215],"basic":[17],"gates.":[19],"Constructing":[20],"such":[21],"free":[24,95,121],"sketches":[25,96,122],"is":[26,110,148,197,207],"first":[28],"step":[29],"in":[30,214],"design":[32,61,170],"process.":[33],"After":[34],"that":[35,76,91,193,204],"schematic":[38,66],"or":[39],"code":[40],"has":[41],"to":[42,48,85,111,150,162,166,190,209],"be":[43,78,134,158],"generated":[44],"before":[45],"being":[46],"able":[47,208],"simulate":[49],"design.":[51],"While":[52],"most":[53],"mentioned":[56],"steps":[57],"automated":[59],"automation":[62],"tools,":[63],"drafting":[64],"then":[69],"converting":[70],"it":[71,156],"into":[72,100,126,171],"a":[73,131,172],"valid":[74],"format":[75],"can":[77,92,157],"simulated":[79],"still":[81],"done":[82],"manually":[83],"due":[84],"lack":[87],"robust":[89,198],"tools":[90,117],"recognize":[93,210],"incorporate":[98,124],"them":[99,125],"end":[101],"user":[102],"simulators.":[103],"Hence,":[104],"goal":[106],"this":[108,146,177],"paper":[109],"construct":[112],"deploy":[114],"computer":[115],"simulation":[116,128],"capable":[118],"understanding":[120],"useful":[127,135],"tools.":[129],"Such":[130],"tool":[132,147],"will":[133],"at":[136],"both":[137],"educational":[139],"industrial":[142],"levels.":[143],"Moreover,":[144],"while":[145],"designed":[149,195],"deal":[151],"with":[152,218],"sketched":[153,169],"circuits,":[155],"generalized":[159],"applied":[161],"many":[163],"other":[164],"fields":[165],"convert":[167],"format.":[174],"To":[175],"implement":[176],"tool,":[178],"we":[179],"relied":[180],"on":[181],"emerging":[183],"machine":[184],"learning":[185],"image":[187],"processing":[188],"concepts":[189],"make":[191],"sure":[192],"accurate.":[200],"Our":[201],"results":[202],"show":[203],"our":[205],"all":[211],"gates":[213],"more":[219],"than":[220],"95%":[221],"accuracy.":[222]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2026-03-21T08:13:44.787528","created_date":"2025-10-10T00:00:00"}