{"id":"https://openalex.org/W3004670337","doi":"https://doi.org/10.3906/elk-1907-72","title":"A power and area efficient approximate carry skip adder for error resilient applications","display_name":"A power and area efficient approximate carry skip adder for error resilient applications","publication_year":2019,"publication_date":"2019-09-12","ids":{"openalex":"https://openalex.org/W3004670337","doi":"https://doi.org/10.3906/elk-1907-72","mag":"3004670337"},"language":"en","primary_location":{"id":"doi:10.3906/elk-1907-72","is_oa":false,"landing_page_url":"https://doi.org/10.3906/elk-1907-72","pdf_url":null,"source":{"id":"https://openalex.org/S32837994","display_name":"TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES","issn_l":"1300-0632","issn":["1300-0632","1303-6203"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310318422","host_organization_name":"Scientific and Technological Research Council of Turkey (TUBITAK)","host_organization_lineage":["https://openalex.org/P4310318422"],"host_organization_lineage_names":["Scientific and Technological Research Council of Turkey (TUBITAK)"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087401305","display_name":"Sujit Kumar Patel","orcid":"https://orcid.org/0000-0002-6160-1809"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Sujit Kumar PATEL","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013232360","display_name":"Bharat Garg","orcid":"https://orcid.org/0000-0002-2904-3720"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Bharat GARG","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5014511229","display_name":"Shireesh Kumar","orcid":"https://orcid.org/0000-0001-7230-0166"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Shireesh Kumar RAI","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5087401305"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2385,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.5748503,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"28","issue":"1","first_page":"443","last_page":"457"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.9609211683273315},{"id":"https://openalex.org/keywords/carry-save-adder","display_name":"Carry-save adder","score":0.7455509305000305},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6878364086151123},{"id":"https://openalex.org/keywords/serial-binary-adder","display_name":"Serial binary adder","score":0.5987168550491333},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.47594404220581055},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4626743197441101},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.4557270109653473},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.44060346484184265},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4286290109157562},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34930533170700073},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.32418984174728394},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.21338599920272827},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0947498083114624},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.06507852673530579}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.9609211683273315},{"id":"https://openalex.org/C3227080","wikidata":"https://www.wikidata.org/wiki/Q5046770","display_name":"Carry-save adder","level":4,"score":0.7455509305000305},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6878364086151123},{"id":"https://openalex.org/C116206932","wikidata":"https://www.wikidata.org/wiki/Q7454686","display_name":"Serial binary adder","level":4,"score":0.5987168550491333},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.47594404220581055},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4626743197441101},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4557270109653473},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.44060346484184265},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4286290109157562},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34930533170700073},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.32418984174728394},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.21338599920272827},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0947498083114624},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.06507852673530579},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.3906/elk-1907-72","is_oa":false,"landing_page_url":"https://doi.org/10.3906/elk-1907-72","pdf_url":null,"source":{"id":"https://openalex.org/S32837994","display_name":"TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES","issn_l":"1300-0632","issn":["1300-0632","1303-6203"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310318422","host_organization_name":"Scientific and Technological Research Council of Turkey (TUBITAK)","host_organization_lineage":["https://openalex.org/P4310318422"],"host_organization_lineage_names":["Scientific and Technological Research Council of Turkey (TUBITAK)"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES","raw_type":"journal-article"},{"id":"pmh:oai:dergipark.org.tr:article/725185","is_oa":false,"landing_page_url":"https://dergipark.org.tr/tr/pub/tbtkelektrik/issue/53852/725185","pdf_url":null,"source":{"id":"https://openalex.org/S4306401840","display_name":"DergiPark (Istanbul University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I67581229","host_organization_name":"Istanbul University","host_organization_lineage":["https://openalex.org/I67581229"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"\\n                                                                    Volume: 28, Issue: 1\\n                                                                                                    443-457\\n                                                                \\n                            ","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2364181090","https://openalex.org/W4299002946","https://openalex.org/W2950518102","https://openalex.org/W2516396101","https://openalex.org/W2953746839","https://openalex.org/W2370097872","https://openalex.org/W2112595260","https://openalex.org/W4295540194","https://openalex.org/W986131379","https://openalex.org/W1993041309"],"abstract_inverted_index":{"The":[0,14,83,116],"compute-intensive":[1],"multimedia":[2],"applications":[3],"on":[4],"portable":[5],"devices":[6],"require":[7],"power":[8,67],"and":[9,25,41,59,68,92,103,127,131],"area":[10,69,130],"efficient":[11,70],"arithmetic":[12,23],"units.":[13],"adder":[15,47,75,81,89,124,140,155],"is":[16,76,90],"a":[17,43,65,159,169],"prime":[18],"building":[19],"block":[20],"of":[21,37,85,161],"these":[22],"units":[24],"limits":[26],"the":[27,34,38,56,61,79,86,95,106,111,121,135,142,146,153,165],"overall":[28],"performance.":[29],"Therefore,":[30],"this":[31],"paper":[32],"analyzes":[33],"logic":[35,53,58],"operations":[36],"state-of-the-art":[39],"adders":[40,97],"presents":[42],"novel":[44,80],"low":[45],"complexity":[46],"segment":[48],"with":[49,110,141,152,168],"new":[50,66],"carry":[51,72,137],"prediction":[52],"by":[54,98,158],"removing":[55],"redundant":[57],"sharing":[60],"common":[62],"operations.":[63],"Further,":[64,145],"approximate":[71,139],"skip":[73],"(PAEA-CSK)":[74],"proposed":[77,87,122,154],"using":[78,105],"segment.":[82],"effectiveness":[84],"PAEA-CSK":[88,123],"evaluated":[91],"compared":[93],"over":[94,134,164],"existing":[96,136],"implementing":[99],"them":[100],"in":[101],"VHDL":[102],"synthesizing":[104],"Synopsys":[107],"Design":[108],"Compiler":[109],"65nm":[112],"TSMC":[113],"CMOS":[114],"Library.":[115],"synthesis":[117],"result":[118],"shows":[119],"that":[120],"requires":[125],"$27.28\\%$":[126],"$18.03\\%$":[128],"less":[129],"power,":[132],"respectively,":[133],"skip-based":[138],"same":[143],"accuracy.":[144],"Sobel":[147],"edge":[148],"detector":[149],"(SED)":[150],"embedded":[151,167],"improves":[156],"PSNR":[157],"minimum":[160],"16.94":[162],"dB":[163],"SED":[166],"nonzeroing":[170],"bit-truncation":[171],"adder.":[172]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}