{"id":"https://openalex.org/W2293692167","doi":"https://doi.org/10.3233/ifs-151680","title":"CMOS implementation of a novel analog multiplier/divider to realize centroid strategy in defuzzifier block","display_name":"CMOS implementation of a novel analog multiplier/divider to realize centroid strategy in defuzzifier block","publication_year":2015,"publication_date":"2015-07-29","ids":{"openalex":"https://openalex.org/W2293692167","doi":"https://doi.org/10.3233/ifs-151680","mag":"2293692167"},"language":"en","primary_location":{"id":"doi:10.3233/ifs-151680","is_oa":false,"landing_page_url":"https://doi.org/10.3233/ifs-151680","pdf_url":null,"source":{"id":"https://openalex.org/S179157397","display_name":"Journal of Intelligent & Fuzzy Systems","issn_l":"1064-1246","issn":["1064-1246","1875-8967"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310318577","host_organization_name":"IOS Press","host_organization_lineage":["https://openalex.org/P4310318577"],"host_organization_lineage_names":["IOS Press"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Intelligent &amp; Fuzzy Systems: Applications in Engineering and Technology","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014197483","display_name":"Naser Beyraghi","orcid":"https://orcid.org/0009-0003-5544-4442"},"institutions":[{"id":"https://openalex.org/I38476204","display_name":"Urmia University","ror":"https://ror.org/032fk0x53","country_code":"IR","type":"education","lineage":["https://openalex.org/I38476204"]}],"countries":["IR"],"is_corresponding":true,"raw_author_name":"Naser Beyraghi","raw_affiliation_strings":["Urmia University","Microelectronics Research Laboratory, Urmia University, Urmia, Iran"],"affiliations":[{"raw_affiliation_string":"Urmia University","institution_ids":["https://openalex.org/I38476204"]},{"raw_affiliation_string":"Microelectronics Research Laboratory, Urmia University, Urmia, Iran","institution_ids":["https://openalex.org/I38476204"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035961114","display_name":"Abdollah Khoei","orcid":"https://orcid.org/0000-0002-2715-9762"},"institutions":[{"id":"https://openalex.org/I38476204","display_name":"Urmia University","ror":"https://ror.org/032fk0x53","country_code":"IR","type":"education","lineage":["https://openalex.org/I38476204"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Abdollah Khoei","raw_affiliation_strings":["Urmia University","Microelectronics Research Laboratory, Urmia University, Urmia, Iran"],"affiliations":[{"raw_affiliation_string":"Urmia University","institution_ids":["https://openalex.org/I38476204"]},{"raw_affiliation_string":"Microelectronics Research Laboratory, Urmia University, Urmia, Iran","institution_ids":["https://openalex.org/I38476204"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5014197483"],"corresponding_institution_ids":["https://openalex.org/I38476204"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.13748145,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"29","issue":"5","first_page":"2029","last_page":"2038"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/centroid","display_name":"Centroid","score":0.7158560156822205},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.5975546836853027},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5972016453742981},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5906749963760376},{"id":"https://openalex.org/keywords/analog-multiplier","display_name":"Analog multiplier","score":0.5680496096611023},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5506729483604431},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.5437208414077759},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34442663192749023},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3196266293525696},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2791588306427002},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.18457695841789246},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1373618245124817},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.11197656393051147},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.04283908009529114}],"concepts":[{"id":"https://openalex.org/C146599234","wikidata":"https://www.wikidata.org/wiki/Q511093","display_name":"Centroid","level":2,"score":0.7158560156822205},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.5975546836853027},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5972016453742981},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5906749963760376},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.5680496096611023},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5506729483604431},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.5437208414077759},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34442663192749023},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3196266293525696},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2791588306427002},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.18457695841789246},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1373618245124817},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.11197656393051147},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.04283908009529114},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.3233/ifs-151680","is_oa":false,"landing_page_url":"https://doi.org/10.3233/ifs-151680","pdf_url":null,"source":{"id":"https://openalex.org/S179157397","display_name":"Journal of Intelligent & Fuzzy Systems","issn_l":"1064-1246","issn":["1064-1246","1875-8967"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310318577","host_organization_name":"IOS Press","host_organization_lineage":["https://openalex.org/P4310318577"],"host_organization_lineage_names":["IOS Press"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Intelligent &amp; Fuzzy Systems: Applications in Engineering and Technology","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W167876671","https://openalex.org/W934915439","https://openalex.org/W1494659719","https://openalex.org/W1505635372","https://openalex.org/W1518776712","https://openalex.org/W1527808348","https://openalex.org/W1580404655","https://openalex.org/W1703551318","https://openalex.org/W1979258624","https://openalex.org/W1980972923","https://openalex.org/W2001746693","https://openalex.org/W2002588635","https://openalex.org/W2005029110","https://openalex.org/W2019399300","https://openalex.org/W2026070348","https://openalex.org/W2039792859","https://openalex.org/W2054708976","https://openalex.org/W2070916037","https://openalex.org/W2083785358","https://openalex.org/W2094206879","https://openalex.org/W2102458641","https://openalex.org/W2106233621","https://openalex.org/W2108151997","https://openalex.org/W2115072746","https://openalex.org/W2138735632","https://openalex.org/W2139469934","https://openalex.org/W2143165612","https://openalex.org/W2162805417","https://openalex.org/W2164735472","https://openalex.org/W2167346087","https://openalex.org/W2168589904","https://openalex.org/W2169365960","https://openalex.org/W2171421781","https://openalex.org/W4244805026"],"related_works":["https://openalex.org/W2089088242","https://openalex.org/W2145104756","https://openalex.org/W2343687813","https://openalex.org/W2113697565","https://openalex.org/W2997198572","https://openalex.org/W4281295723","https://openalex.org/W2760424941","https://openalex.org/W1965508384","https://openalex.org/W2117233677","https://openalex.org/W2165446669"],"abstract_inverted_index":{"This":[0,32],"paper,":[1],"presents":[2],"a":[3,7,43,61,121],"CMOS":[4,58],"design":[5],"of":[6,42,64,82,98,112,120,133,139,145],"novel":[8],"current-mode":[9],"analog":[10,33],"multiplier/divider":[11,34,115],"which":[12],"can":[13,105],"be":[14,106],"used":[15],"in":[16,47,56,91,108,116],"defuzzifier":[17,118],"block":[18,119],"for":[19,70],"fuzzy":[20,85],"logic":[21,86],"controllers":[22],"(FLC)":[23],"and":[24,104,127],"neuro-fuzzy":[25],"systems":[26],"to":[27,88],"realize":[28],"the":[29,39,48,71,79,83,113,117,131,140,146,152],"centroid":[30],"strategy.":[31],"circuit":[35,73,100],"operates":[36],"based":[37],"on":[38],"square-law":[40],"characteristic":[41],"MOS":[44],"transistor":[45],"operated":[46],"saturation":[49],"region.":[50],"The":[51,67,94,110],"proposed":[52,72,114],"circuits":[53],"are":[54],"designed":[55],"0.18\u03bcm":[57],"technology":[59],"with":[60],"power":[62,96],"supply":[63],"2":[65],"Volt.":[66],"maximum":[68,95],"delay":[69],"is":[74,101,143],"50.7":[75],"ns":[76],"that":[77,130],"restricts":[78],"inference":[80],"speed":[81],"total":[84],"controller":[87],"20":[89],"MFLIPS":[90],"its":[92],"turn.":[93],"consumption":[97],"this":[99],"about":[102],"626\u03bcW":[103],"implemented":[107],"84\u03bcm\u00d736\u03bcm.":[109],"functionality":[111],"typical":[122],"(3\u00d73)":[123],"FLC":[124],"was":[125],"evaluated":[126],"results":[128],"indicate":[129],"percentage":[132],"root":[134],"mean":[135],"squarer":[136],"error":[137],"(RMSE)":[138],"output":[141,154],"surface":[142,155],"1.08%":[144],"full":[147],"scale":[148],"output.":[149],"To":[150],"obtain":[151],"ideal":[153],"MATLAB":[156],"software":[157],"has":[158],"been":[159],"utilized.":[160]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1}],"updated_date":"2026-01-08T20:05:33.558190","created_date":"2025-10-10T00:00:00"}
