{"id":"https://openalex.org/W2396158585","doi":"https://doi.org/10.3233/978-1-60750-774-1-287","title":"SystemVerilogCSP: Modeling Digital Asynchronous Circuits Using SystemVerilog Interfaces","display_name":"SystemVerilogCSP: Modeling Digital Asynchronous Circuits Using SystemVerilog Interfaces","publication_year":2011,"publication_date":"2011-01-01","ids":{"openalex":"https://openalex.org/W2396158585","doi":"https://doi.org/10.3233/978-1-60750-774-1-287","mag":"2396158585"},"language":"en","primary_location":{"id":"doi:10.3233/978-1-60750-774-1-287","is_oa":false,"landing_page_url":"https://doi.org/10.3233/978-1-60750-774-1-287","pdf_url":null,"source":{"id":"https://openalex.org/S4306463470","display_name":"IOS Press eBooks","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310318577","host_organization_name":"IOS Press","host_organization_lineage":["https://openalex.org/P4310318577"],"host_organization_lineage_names":["IOS Press"],"type":"ebook platform"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Concurrent Systems Engineering Series","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050975448","display_name":"Arash Saifhashemi","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]},{"id":"https://openalex.org/I2800817003","display_name":"Southern California University for Professional Studies","ror":"https://ror.org/058zz0t50","country_code":"US","type":"education","lineage":["https://openalex.org/I2800817003"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Saifhashemi Arash","raw_affiliation_strings":["University  of Southern California"],"affiliations":[{"raw_affiliation_string":"University  of Southern California","institution_ids":["https://openalex.org/I2800817003","https://openalex.org/I1174212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084205024","display_name":"Peter A. Beerel","orcid":"https://orcid.org/0000-0002-8283-0168"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Beerel Peter A.","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5050975448"],"corresponding_institution_ids":["https://openalex.org/I1174212","https://openalex.org/I2800817003"],"apc_list":null,"apc_paid":null,"fwci":2.5386,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.91137083,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.827685534954071},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6956428289413452},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.24398848414421082}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.827685534954071},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6956428289413452},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.24398848414421082}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.3233/978-1-60750-774-1-287","is_oa":false,"landing_page_url":"https://doi.org/10.3233/978-1-60750-774-1-287","pdf_url":null,"source":{"id":"https://openalex.org/S4306463470","display_name":"IOS Press eBooks","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310318577","host_organization_name":"IOS Press","host_organization_lineage":["https://openalex.org/P4310318577"],"host_organization_lineage_names":["IOS Press"],"type":"ebook platform"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Concurrent Systems Engineering Series","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W136427456","https://openalex.org/W159143495","https://openalex.org/W176614477","https://openalex.org/W231740716","https://openalex.org/W232434517","https://openalex.org/W1493087819","https://openalex.org/W1562133527","https://openalex.org/W1577323490","https://openalex.org/W1951899050","https://openalex.org/W2100382727","https://openalex.org/W2103953153","https://openalex.org/W2125667788","https://openalex.org/W2150872535","https://openalex.org/W2162589154","https://openalex.org/W2171044556","https://openalex.org/W2799087446","https://openalex.org/W3144368627"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2116677773","https://openalex.org/W2155261584","https://openalex.org/W2584231425","https://openalex.org/W2150611273","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W4207086172"],"abstract_inverted_index":{"This":[0,32],"paper":[1],"describes":[2],"how":[3,53,66],"to":[4,54,67,74],"model":[5,55,75],"channel-based":[6],"digital":[7],"asynchronous":[8,88],"circuits":[9],"using":[10],"SystemVerilog":[11],"interfaces":[12,19],"that":[13,38,82],"implement":[14],"CSP-like":[15],"communication":[16,69],"events.":[17,31],"The":[18],"enable":[20],"explicit":[21],"handshaking":[22,80],"of":[23,44],"channel":[24],"wires":[25],"as":[26,28],"well":[27],"abstract":[29,34],"CSP":[30],"enables":[33],"connections":[35],"between":[36],"modules":[37],"are":[39,83],"described":[40],"at":[41],"different":[42],"levels":[43],"abstraction":[45],"facilitating":[46],"both":[47],"verification":[48],"and":[49,60],"design.":[50],"We":[51],"explain":[52],"one-to-one,":[56],"one-to-many,":[57],"one-to-any,":[58],"any-to-one":[59],"synchronised":[61],"channels.":[62],"Moreover,":[63],"we":[64],"describe":[65],"split":[68],"actions":[70],"into":[71],"multiple":[72],"parts":[73],"more":[76],"accurately":[77],"less":[78],"concurrent":[79],"protocols":[81],"commonly":[84],"found":[85],"in":[86],"many":[87],"pipelines.":[89]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}
