{"id":"https://openalex.org/W1987289396","doi":"https://doi.org/10.3166/tsi.25.845-865","title":"Synth\u00e8se automatique de microcontr\u00f4leurs sp\u00e9cialis\u00e9s sur FPGA","display_name":"Synth\u00e8se automatique de microcontr\u00f4leurs sp\u00e9cialis\u00e9s sur FPGA","publication_year":2006,"publication_date":"2006-08-01","ids":{"openalex":"https://openalex.org/W1987289396","doi":"https://doi.org/10.3166/tsi.25.845-865","mag":"1987289396"},"language":"fr","primary_location":{"id":"doi:10.3166/tsi.25.845-865","is_oa":false,"landing_page_url":"https://doi.org/10.3166/tsi.25.845-865","pdf_url":null,"source":{"id":"https://openalex.org/S4210191397","display_name":"Techniques et sciences informatiques","issn_l":"0752-4072","issn":["0752-4072","2116-5920"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Techniques et sciences informatiques","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037842293","display_name":"Ludovic L\u2019Hours","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Ludovic L'Hours","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":["https://openalex.org/A5037842293"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.08120145,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"25","issue":"7","first_page":"845","last_page":"865"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9921000003814697,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.49548065662384033},{"id":"https://openalex.org/keywords/humanities","display_name":"Humanities","score":0.4144875109195709},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3930184543132782},{"id":"https://openalex.org/keywords/art","display_name":"Art","score":0.27933889627456665},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.16325333714485168}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.49548065662384033},{"id":"https://openalex.org/C15708023","wikidata":"https://www.wikidata.org/wiki/Q80083","display_name":"Humanities","level":1,"score":0.4144875109195709},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3930184543132782},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.27933889627456665},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.16325333714485168}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.3166/tsi.25.845-865","is_oa":false,"landing_page_url":"https://doi.org/10.3166/tsi.25.845-865","pdf_url":null,"source":{"id":"https://openalex.org/S4210191397","display_name":"Techniques et sciences informatiques","issn_l":"0752-4072","issn":["0752-4072","2116-5920"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Techniques et sciences informatiques","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2111241003","https://openalex.org/W2390279801","https://openalex.org/W4200391368","https://openalex.org/W2358668433","https://openalex.org/W2210979487","https://openalex.org/W2074043759","https://openalex.org/W2376932109","https://openalex.org/W2001405890"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3,58],"present":[4],"an":[5,29],"automated":[6],"flow":[7,25,70],"geared":[8],"toward":[9],"the":[10],"synthesis":[11],"of":[12,77,101],"application":[13,30],"specific":[14,96],"micro-controllers":[15],"for":[16,56],"FPG":[17],"As,":[18],"targeted":[19],"at":[20],"control":[21],"dominated":[22],"applications.":[23],"Our":[24],"takes":[26],"as":[27],"input":[28],"described":[31],"in":[32,99],"C,":[33],"and":[34,80,106],"uses":[35],"profiling":[36],"information":[37],"to":[38,50],"extract":[39],"a":[40,51,60,75],"specialized":[41],"instruction":[42,45],"set.":[43],"This":[44],"set":[46,76],"is":[47],"then":[48],"mapped":[49],"generic":[52],"RISC":[53],"micro-architecture":[54],"model,":[55],"which":[57],"generate":[59],"synthesizable":[61],"VHDL":[62],"description,":[63],"along":[64],"with":[65,93],"its":[66],"associated":[67],"program.":[68],"The":[69],"has":[71],"been":[72],"validated":[73],"on":[74],"representative":[78],"applications":[79],"our":[81,87],"preliminary":[82],"experimental":[83],"results":[84],"show":[85],"that":[86],"generated":[88],"architectures":[89],"are":[90],"very":[91],"competitive":[92],"FPGA":[94],"vendor":[95],"processor":[97],"soft-cores,":[98],"terms":[100],"code":[102],"size,":[103],"resource":[104],"usage":[105],"performance.":[107]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}