{"id":"https://openalex.org/W4385192498","doi":"https://doi.org/10.23919/vlsitechnologyandcir57934.2023.10185424","title":"A 2.38 MCells/mm<sup>2</sup> 9.81 -350 TOPS/W RRAM Compute-in-Memory Macro in 40nm CMOS with Hybrid Offset/I<sub>OFF</sub> Cancellation and I<sub>CELL</sub> R<sub>BLSL</sub> Drop Mitigation","display_name":"A 2.38 MCells/mm<sup>2</sup> 9.81 -350 TOPS/W RRAM Compute-in-Memory Macro in 40nm CMOS with Hybrid Offset/I<sub>OFF</sub> Cancellation and I<sub>CELL</sub> R<sub>BLSL</sub> Drop Mitigation","publication_year":2023,"publication_date":"2023-06-11","ids":{"openalex":"https://openalex.org/W4385192498","doi":"https://doi.org/10.23919/vlsitechnologyandcir57934.2023.10185424"},"language":"en","primary_location":{"id":"doi:10.23919/vlsitechnologyandcir57934.2023.10185424","is_oa":false,"landing_page_url":"https://doi.org/10.23919/vlsitechnologyandcir57934.2023.10185424","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027137793","display_name":"Samuel Spetalnick","orcid":"https://orcid.org/0000-0003-1627-9002"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Samuel D. Spetalnick","raw_affiliation_strings":["Georgia Institute of Technology,Atlanta,GA,USA","Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology,Atlanta,GA,USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078008152","display_name":"Muya Chang","orcid":"https://orcid.org/0000-0002-3035-1106"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]},{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW","US"],"is_corresponding":false,"raw_author_name":"Muya Chang","raw_affiliation_strings":["Georgia Institute of Technology,Atlanta,GA,USA","TSMC Corporate Research,Hsinchu,Taiwan","Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology,Atlanta,GA,USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"TSMC Corporate Research,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029142475","display_name":"S. KONNO","orcid":"https://orcid.org/0000-0003-3125-3580"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shota Konno","raw_affiliation_strings":["Georgia Institute of Technology,Atlanta,GA,USA","Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology,Atlanta,GA,USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089938000","display_name":"Brian Crafton","orcid":"https://orcid.org/0000-0002-0227-0421"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Brian Crafton","raw_affiliation_strings":["Georgia Institute of Technology,Atlanta,GA,USA","Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology,Atlanta,GA,USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040695095","display_name":"Ashwin Sanjay Lele","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ashwin S. Lele","raw_affiliation_strings":["Georgia Institute of Technology,Atlanta,GA,USA","Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology,Atlanta,GA,USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083012416","display_name":"Win-San Khwa","orcid":"https://orcid.org/0000-0002-6283-3564"},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Win-San Khwa","raw_affiliation_strings":["TSMC Corporate Research,Hsinchu,Taiwan","TSMC Corporate Research, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"TSMC Corporate Research,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"TSMC Corporate Research, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109491324","display_name":"Yu-Der Chih","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yu-Der Chih","raw_affiliation_strings":["TSMC Design Technology,Hsinchu,Taiwan","TSMC Design Technology, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"TSMC Design Technology,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"TSMC Design Technology, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023225287","display_name":"Meng\u2010Fan Chang","orcid":"https://orcid.org/0000-0001-6905-6350"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]},{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW","US"],"is_corresponding":false,"raw_author_name":"Meng-Fan Chang","raw_affiliation_strings":["Georgia Institute of Technology,Atlanta,GA,USA","TSMC Corporate Research,Hsinchu,Taiwan","TSMC Corporate Research, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology,Atlanta,GA,USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"TSMC Corporate Research,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"TSMC Corporate Research, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091408102","display_name":"Arijit Raychowdhury","orcid":"https://orcid.org/0000-0001-8391-0576"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arijit Raychowdhury","raw_affiliation_strings":["Georgia Institute of Technology,Atlanta,GA,USA","Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology,Atlanta,GA,USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":9,"corresponding_author_ids":["https://openalex.org/A5027137793"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":2.7955,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.91005494,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.9087937474250793},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.6922076940536499},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6736629605293274},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.6100011467933655},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.5634673237800598},{"id":"https://openalex.org/keywords/bit-error-rate","display_name":"Bit error rate","score":0.4347626566886902},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.43142372369766235},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.41914474964141846},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.40980562567710876},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40237995982170105},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3923179805278778},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.3640713691711426},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2967284917831421},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18648681044578552},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.17152947187423706}],"concepts":[{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.9087937474250793},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.6922076940536499},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6736629605293274},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.6100011467933655},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.5634673237800598},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.4347626566886902},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.43142372369766235},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.41914474964141846},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.40980562567710876},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40237995982170105},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3923179805278778},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.3640713691711426},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2967284917831421},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18648681044578552},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.17152947187423706},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/vlsitechnologyandcir57934.2023.10185424","is_oa":false,"landing_page_url":"https://doi.org/10.23919/vlsitechnologyandcir57934.2023.10185424","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2076211355","https://openalex.org/W2007070351","https://openalex.org/W2033811947","https://openalex.org/W2183989414","https://openalex.org/W1551399929","https://openalex.org/W2410132916","https://openalex.org/W989761102","https://openalex.org/W2162174949","https://openalex.org/W2104937488","https://openalex.org/W2533127403"],"abstract_inverted_index":{"A":[0],"dense":[1],"compute-in-memory":[2],"(CIM)":[3],"macro":[4,53],"using":[5],"resistive":[6],"random-access":[7],"memory":[8],"(RRAM)":[9],"showing":[10],"solutions":[11],"to":[12,96],"read":[13],"channel":[14],"mismatch,":[15],"high":[16],"I":[17],"<inf":[18],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[19],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">OFF</inf>":[20],",":[21],"ADC":[22],"offset,":[23],"IR":[24],"drop,":[25],"and":[26,40,84],"cell":[27,47,74],"resistance":[28],"variation":[29],"is":[30],"presented.":[31],"By":[32],"combining":[33],"a":[34,45],"hybrid":[35],"analog/mixed-signal":[36],"offset":[37],"cancellation":[38],"scheme":[39],"$I_{CELL}R_{BLSL}$":[41],"drop":[42],"mitigation":[43],"with":[44],"low":[46],"bias":[48],"target":[49],"voltage,":[50],"the":[51,97],"proposed":[52],"demonstrates":[54],"robust":[55],"operation":[56],"(post-ECC":[57],"bit":[58],"error":[59],"rate":[60],"(BER":[61],"$)":[62],"\\lt":[63],"5":[64],"\\times":[65,89],"10^{-8}$":[66],"for":[67],"8WL":[68],"CIM)":[69],"while":[70],"maintaining":[71],"an":[72],"effective":[73],"density":[75],"1.03":[76],"\u2013":[77,87],"$33.1":[78],"\\times$":[79],"higher":[80],"than":[81],"prior":[82],"art":[83],"achieving":[85],"1.74":[86],"$13.35":[88],"$":[90],"improved":[91],"average":[92],"MAC":[93],"efficiency":[94],"relative":[95],"previous":[98],"highest-density":[99],"RRAM":[100],"CIM":[101],"macro.":[102]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":10},{"year":2024,"cited_by_count":9},{"year":2023,"cited_by_count":1}],"updated_date":"2026-03-10T14:07:55.174380","created_date":"2025-10-10T00:00:00"}