{"id":"https://openalex.org/W2966123882","doi":"https://doi.org/10.23919/vlsic.2019.8778094","title":"The Demonstration of Gate Dielectric-fuse 4kb OTP Memory Feasible for Embedded Applications in High-k Metal-gate CMOS Generations and Beyond","display_name":"The Demonstration of Gate Dielectric-fuse 4kb OTP Memory Feasible for Embedded Applications in High-k Metal-gate CMOS Generations and Beyond","publication_year":2019,"publication_date":"2019-06-01","ids":{"openalex":"https://openalex.org/W2966123882","doi":"https://doi.org/10.23919/vlsic.2019.8778094","mag":"2966123882"},"language":"en","primary_location":{"id":"doi:10.23919/vlsic.2019.8778094","is_oa":false,"landing_page_url":"https://doi.org/10.23919/vlsic.2019.8778094","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 Symposium on VLSI Circuits","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112737249","display_name":"E. R. Hsieh","orcid":null},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"E. R. Hsieh","raw_affiliation_strings":["Department of Electrical Engineering, Stanford University, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Stanford University, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100883353","display_name":"Chin-Liang Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"C. W. Chang","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5106425296","display_name":"C. C. Chuang","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"C. C. Chuang","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112395824","display_name":"H. W. Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"H. W. Chen","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064704800","display_name":"Steve S. Chung","orcid":"https://orcid.org/0000-0002-1732-8518"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Steve S. Chung","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5112737249"],"corresponding_institution_ids":["https://openalex.org/I97018004"],"apc_list":null,"apc_paid":null,"fwci":0.2385,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.54590169,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"C208","last_page":"C209"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6635339856147766},{"id":"https://openalex.org/keywords/fuse","display_name":"Fuse (electrical)","score":0.6157128214836121},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.6009243130683899},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5871965885162354},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5784730315208435},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5133022665977478},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49867725372314453},{"id":"https://openalex.org/keywords/high-\u03ba-dielectric","display_name":"High-\u03ba dielectric","score":0.4739782214164734},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.45443812012672424},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.4004931151866913},{"id":"https://openalex.org/keywords/dielectric","display_name":"Dielectric","score":0.3853757977485657},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.36858415603637695},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3309803605079651},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2877601981163025},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11516135931015015}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6635339856147766},{"id":"https://openalex.org/C141353440","wikidata":"https://www.wikidata.org/wiki/Q182221","display_name":"Fuse (electrical)","level":2,"score":0.6157128214836121},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.6009243130683899},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5871965885162354},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5784730315208435},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5133022665977478},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49867725372314453},{"id":"https://openalex.org/C16317505","wikidata":"https://www.wikidata.org/wiki/Q132013","display_name":"High-\u03ba dielectric","level":3,"score":0.4739782214164734},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.45443812012672424},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.4004931151866913},{"id":"https://openalex.org/C133386390","wikidata":"https://www.wikidata.org/wiki/Q184996","display_name":"Dielectric","level":2,"score":0.3853757977485657},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.36858415603637695},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3309803605079651},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2877601981163025},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11516135931015015},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/vlsic.2019.8778094","is_oa":false,"landing_page_url":"https://doi.org/10.23919/vlsic.2019.8778094","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 Symposium on VLSI Circuits","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Responsible consumption and production","id":"https://metadata.un.org/sdg/12","score":0.4300000071525574}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2328277060","https://openalex.org/W2766609299"],"related_works":["https://openalex.org/W3000097931","https://openalex.org/W2354322770","https://openalex.org/W4237547500","https://openalex.org/W1570848052","https://openalex.org/W2373192430","https://openalex.org/W4239268388","https://openalex.org/W1537496349","https://openalex.org/W2379407973","https://openalex.org/W2170979950","https://openalex.org/W1900707063"],"abstract_inverted_index":{"A":[0],"4kb":[1],"macro":[2,50],"of":[3,34,56],"One":[4],"Time":[5],"Programming":[6],"(OTP)":[7],"memory,":[8],"implemented":[9],"by":[10],"a":[11,23,35],"new":[12],"breakdown,":[13,18],"named":[14],"dielectric":[15],"fuse":[16],"(dFuse)":[17],"has":[19],"been":[20],"realized":[21],"on":[22,84],"foundry":[24],"pure":[25],"logic":[26],"28nm":[27],"HKMG":[28],"CMOS":[29],"platform.":[30],"The":[31,44],"feature":[32],"size":[33],"unit":[36],"cell":[37,41],"is":[38,81,94],"1.5T":[39],"per":[40],"with":[42],"$7.5\\mathrm{F}^{2}$.":[43],"experimental":[45],"results":[46],"show":[47],"that":[48],"dFuse":[49],"exhibits":[51],"high":[52],"programming":[53],"(PGM)":[54],"speed":[55],"100ns":[57],"at":[58,65,74],"4V,":[59],"read":[60],"time":[61],"smaller":[62],"than":[63],"10ns":[64],"0.75V,":[66],"and":[67,106,110,119],"excellent":[68],"data":[69],"retention":[70],"under":[71],"one-month":[72],"baking":[73],"150\u00b0C.":[75],"More":[76],"importantly,":[77],"the":[78,85,114],"program":[79],"voltage":[80],"weakly":[82],"dependent":[83],"environmental":[86],"temperature,":[87],"suitable":[88],"for":[89,113],"automotive":[90],"applications.":[91],"This":[92],"OTP":[93],"also":[95],"expected":[96],"to":[97,100],"be":[98],"scalable":[99],"advanced":[101],"node":[102],"such":[103],"as":[104],"FinFET":[105],"provides":[107],"an":[108],"ideal":[109],"reliable":[111],"solution":[112],"storage":[115],"purpose":[116],"in":[117],"IoT":[118],"5G":[120],"era.":[121]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}