{"id":"https://openalex.org/W3192592723","doi":"https://doi.org/10.23919/mixdes52406.2021.9497554","title":"Implementation of Coprocessor for Integer Multiple Precision Arithmetic on Zynq Ultrascale+ MPSoC","display_name":"Implementation of Coprocessor for Integer Multiple Precision Arithmetic on Zynq Ultrascale+ MPSoC","publication_year":2021,"publication_date":"2021-06-24","ids":{"openalex":"https://openalex.org/W3192592723","doi":"https://doi.org/10.23919/mixdes52406.2021.9497554","mag":"3192592723"},"language":"en","primary_location":{"id":"doi:10.23919/mixdes52406.2021.9497554","is_oa":false,"landing_page_url":"https://doi.org/10.23919/mixdes52406.2021.9497554","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 28th International Conference on Mixed Design of Integrated Circuits and System","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041652624","display_name":"Tomasz P. Stefa\u0144ski","orcid":"https://orcid.org/0000-0002-3952-5731"},"institutions":[{"id":"https://openalex.org/I169333911","display_name":"Gda\u0144sk University of Technology","ror":"https://ror.org/006x4sc24","country_code":"PL","type":"education","lineage":["https://openalex.org/I169333911"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Tomasz P. Stefanski","raw_affiliation_strings":["Faculty of Electronics, Telecommunications and Informatics, Gdansk University of Technology, Gdansk, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Electronics, Telecommunications and Informatics, Gdansk University of Technology, Gdansk, Poland","institution_ids":["https://openalex.org/I169333911"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015054246","display_name":"Kamil Rudnicki","orcid":"https://orcid.org/0000-0003-3319-5900"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kamil Rudnicki","raw_affiliation_strings":["Brightelligence Sp. z o.o., Lodz, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Brightelligence Sp. z o.o., Lodz, Poland","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008547012","display_name":"Wojciech \u017bebrowski","orcid":"https://orcid.org/0000-0001-8714-280X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Wojciech Zebrowski","raw_affiliation_strings":["Aldec Inc., Gdansk, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Aldec Inc., Gdansk, Poland","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1522,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.52635811,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"280","last_page":"285"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/coprocessor","display_name":"Coprocessor","score":0.9436668753623962},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7655699253082275},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.7632453441619873},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5599527955055237},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5010676383972168},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4855053424835205},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.48483240604400635},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.47226157784461975},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.463248610496521},{"id":"https://openalex.org/keywords/arm-architecture","display_name":"ARM architecture","score":0.41775110363960266}],"concepts":[{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.9436668753623962},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7655699253082275},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.7632453441619873},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5599527955055237},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5010676383972168},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4855053424835205},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.48483240604400635},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.47226157784461975},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.463248610496521},{"id":"https://openalex.org/C26771161","wikidata":"https://www.wikidata.org/wiki/Q16980","display_name":"ARM architecture","level":2,"score":0.41775110363960266},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/mixdes52406.2021.9497554","is_oa":false,"landing_page_url":"https://doi.org/10.23919/mixdes52406.2021.9497554","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 28th International Conference on Mixed Design of Integrated Circuits and System","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.4399999976158142}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W205605391","https://openalex.org/W845857190","https://openalex.org/W1570895503","https://openalex.org/W1957012439","https://openalex.org/W1983325766","https://openalex.org/W1986819906","https://openalex.org/W2063435300","https://openalex.org/W2065237073","https://openalex.org/W2083664444","https://openalex.org/W2090843874","https://openalex.org/W2097682013","https://openalex.org/W2105498384","https://openalex.org/W2118117335","https://openalex.org/W2121516352","https://openalex.org/W2121848241","https://openalex.org/W2612457703","https://openalex.org/W2912046616","https://openalex.org/W2944490985","https://openalex.org/W2980222792","https://openalex.org/W2981965202","https://openalex.org/W3042438505"],"related_works":["https://openalex.org/W2465210354","https://openalex.org/W4281711577","https://openalex.org/W4320058182","https://openalex.org/W2106200299","https://openalex.org/W2178653557","https://openalex.org/W2540211551","https://openalex.org/W2994908368","https://openalex.org/W1975982080","https://openalex.org/W3121982349","https://openalex.org/W1976012348"],"abstract_inverted_index":{"Recently,":[0],"we":[1],"have":[2],"opened":[3],"the":[4,16,68],"source":[5],"code":[6],"of":[7],"coprocessor":[8,24,54],"for":[9,21],"multiple-precision":[10],"arithmetic":[11],"(MPA).":[12],"In":[13,49],"this":[14,22],"contribution,":[15],"implementation":[17],"and":[18],"benchmarking":[19],"results":[20],"MPA":[23,72],"are":[25],"presented":[26],"on":[27,33],"modern":[28],"Zynq":[29],"Ultrascale+":[30],"multiprocessor":[31],"system":[32],"chip,":[34],"which":[35],"combines":[36],"field-programmable":[37],"gate":[38],"array":[39],"with":[40],"quad-core":[41],"ARM":[42],"Cortex-A53":[43],"64-bit":[44],"central":[45],"processing":[46],"unit":[47],"(CPU).":[48],"our":[50],"benchmark,":[51],"a":[52,63,74],"single":[53,64],"can":[55],"be":[56],"up":[57],"to":[58],"4.5":[59],"times":[60],"faster":[61],"than":[62],"CPU":[65],"core":[66],"within":[67],"same":[69],"chip":[70],"emulating":[71],"using":[73],"software":[75],"library.":[76]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
