{"id":"https://openalex.org/W2965070901","doi":"https://doi.org/10.23919/mixdes.2019.8787131","title":"High-Level Functional Test Generation for Microprocessor Modules","display_name":"High-Level Functional Test Generation for Microprocessor Modules","publication_year":2019,"publication_date":"2019-06-01","ids":{"openalex":"https://openalex.org/W2965070901","doi":"https://doi.org/10.23919/mixdes.2019.8787131","mag":"2965070901"},"language":"en","primary_location":{"id":"doi:10.23919/mixdes.2019.8787131","is_oa":false,"landing_page_url":"https://doi.org/10.23919/mixdes.2019.8787131","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065172476","display_name":"Adeboye Stephen Oyeniran","orcid":"https://orcid.org/0000-0002-6344-3875"},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Adeboye Stephen Oyeniran","raw_affiliation_strings":["Tallinn University of Technology, Tallinn, Estonia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tallinn University of Technology, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010536057","display_name":"Raimund Ubar","orcid":"https://orcid.org/0000-0001-8186-4385"},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Raimund Ubar","raw_affiliation_strings":["Tallinn University of Technology, Tallinn, Estonia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tallinn University of Technology, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I111112146"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"356","last_page":"361"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7637819051742554},{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.7563176155090332},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.6388504505157471},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.6084082126617432},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.6080398559570312},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.6009350419044495},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.5396295785903931},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4819181263446808},{"id":"https://openalex.org/keywords/test-data","display_name":"Test data","score":0.46710410714149475},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.46141207218170166},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.4381502866744995},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3262169361114502},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2539556920528412},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2501918077468872},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13346976041793823}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7637819051742554},{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.7563176155090332},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.6388504505157471},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.6084082126617432},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.6080398559570312},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.6009350419044495},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.5396295785903931},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4819181263446808},{"id":"https://openalex.org/C16910744","wikidata":"https://www.wikidata.org/wiki/Q7705759","display_name":"Test data","level":2,"score":0.46710410714149475},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.46141207218170166},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.4381502866744995},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3262169361114502},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2539556920528412},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2501918077468872},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13346976041793823},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/mixdes.2019.8787131","is_oa":false,"landing_page_url":"https://doi.org/10.23919/mixdes.2019.8787131","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1891950198","https://openalex.org/W1927443640","https://openalex.org/W1965015817","https://openalex.org/W1993225874","https://openalex.org/W1995827686","https://openalex.org/W2011494794","https://openalex.org/W2031313028","https://openalex.org/W2033613342","https://openalex.org/W2037073597","https://openalex.org/W2071841318","https://openalex.org/W2082836981","https://openalex.org/W2103363686","https://openalex.org/W2105522986","https://openalex.org/W2111785162","https://openalex.org/W2115386046","https://openalex.org/W2115795793","https://openalex.org/W2152640154","https://openalex.org/W2154237597","https://openalex.org/W2155341425","https://openalex.org/W2156278309","https://openalex.org/W2156710719","https://openalex.org/W2170296906","https://openalex.org/W4233176001","https://openalex.org/W6676649663"],"related_works":["https://openalex.org/W2091833418","https://openalex.org/W2913077774","https://openalex.org/W4256030018","https://openalex.org/W2145089576","https://openalex.org/W2021253405","https://openalex.org/W1986228509","https://openalex.org/W2147400189","https://openalex.org/W1600468096","https://openalex.org/W2340957901","https://openalex.org/W2062172248"],"abstract_inverted_index":{"A":[0],"new":[1],"high-level":[2,26],"implementation-independent":[3],"and":[4,97,126],"automated":[5],"test":[6,39,75,90,108,135],"program":[7],"generation":[8],"method":[9],"for":[10,44,59,93,112,137],"RISC":[11,145],"processors":[12],"is":[13,30,77,85,101],"proposed.":[14,31],"For":[15,56],"testing":[16,138],"the":[17,21,48,52,60,64,88,94,98,104,116,121,124,133,139,143],"control":[18,27,95],"parts":[19],"of":[20,37,47,63,74,106,115,123,132,142],"processor":[22],"modules,":[23],"a":[24,35],"novel":[25],"fault":[28],"model":[29],"Using":[32],"this":[33],"model,":[34],"set":[36,73],"deterministic":[38,89],"data":[40,61,76,91,109],"operands":[41],"are":[42,70],"generated":[43,78,92,111,134],"each":[45,113],"instruction":[46,49,114],"group":[50,117],"using":[51],"module":[53,65,141],"under":[54,66],"test.":[55],"generating":[57],"tests":[58],"path":[62],"test,":[67,96],"pseudo-exhaustive":[68,107],"patterns":[69],"used.":[71],"The":[72,82],"in":[79],"two":[80],"parts.":[81],"first":[83],"part":[84,100],"based":[86],"on":[87],"second":[99],"formed":[102],"by":[103],"sets":[105],"operands,":[110],"separately.":[118],"We":[119],"investigated":[120],"feasibility":[122],"approach":[125],"demonstrated":[127],"high":[128],"gate-level":[129],"stuck-at-fault":[130],"coverage":[131],"programs":[136],"execute":[140],"MiniMIPS":[144],"processor.":[146]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}