{"id":"https://openalex.org/W2965086724","doi":"https://doi.org/10.23919/mixdes.2019.8787120","title":"A Fast-Lock, Low Jitter, High-Speed Half-Rate CDR Architecture with a Composite Phase Detector (CPD)","display_name":"A Fast-Lock, Low Jitter, High-Speed Half-Rate CDR Architecture with a Composite Phase Detector (CPD)","publication_year":2019,"publication_date":"2019-06-01","ids":{"openalex":"https://openalex.org/W2965086724","doi":"https://doi.org/10.23919/mixdes.2019.8787120","mag":"2965086724"},"language":"en","primary_location":{"id":"doi:10.23919/mixdes.2019.8787120","is_oa":false,"landing_page_url":"https://doi.org/10.23919/mixdes.2019.8787120","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024041763","display_name":"Zaher Kakehbra","orcid":null},"institutions":[{"id":"https://openalex.org/I38476204","display_name":"Urmia University","ror":"https://ror.org/032fk0x53","country_code":"IR","type":"education","lineage":["https://openalex.org/I38476204"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Zaher Kakehbra","raw_affiliation_strings":["Microelectronics Research Center, Urmia University, Urmia, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics Research Center, Urmia University, Urmia, Iran","institution_ids":["https://openalex.org/I38476204"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000626357","display_name":"Morteza Mousazadeh","orcid":"https://orcid.org/0000-0003-0699-5208"},"institutions":[{"id":"https://openalex.org/I38476204","display_name":"Urmia University","ror":"https://ror.org/032fk0x53","country_code":"IR","type":"education","lineage":["https://openalex.org/I38476204"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Morteza Mousazadeh","raw_affiliation_strings":["Microelectronics Research Center, Urmia University, Urmia, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics Research Center, Urmia University, Urmia, Iran","institution_ids":["https://openalex.org/I38476204"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035961114","display_name":"Abdollah Khoei","orcid":"https://orcid.org/0000-0002-2715-9762"},"institutions":[{"id":"https://openalex.org/I38476204","display_name":"Urmia University","ror":"https://ror.org/032fk0x53","country_code":"IR","type":"education","lineage":["https://openalex.org/I38476204"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Abdollah Khoei","raw_affiliation_strings":["Microelectronics Research Center, Urmia University, Urmia, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics Research Center, Urmia University, Urmia, Iran","institution_ids":["https://openalex.org/I38476204"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011741364","display_name":"Ali Dadashi","orcid":"https://orcid.org/0000-0003-1021-5753"},"institutions":[{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]}],"countries":["NO"],"is_corresponding":false,"raw_author_name":"Ali Dadashi","raw_affiliation_strings":["Department of Informatics, University of Oslo, Oslo, Norway"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Informatics, University of Oslo, Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.06683863,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"141","last_page":"146"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12004","display_name":"Advanced Frequency and Time Standards","score":0.9904000163078308,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.9147346019744873},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.6341125965118408},{"id":"https://openalex.org/keywords/phase-detector","display_name":"Phase detector","score":0.5584012866020203},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5087957978248596},{"id":"https://openalex.org/keywords/phase-frequency-detector","display_name":"Phase frequency detector","score":0.5013613700866699},{"id":"https://openalex.org/keywords/lock","display_name":"Lock (firearm)","score":0.4773438274860382},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45972129702568054},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.4296380579471588},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.42343825101852417},{"id":"https://openalex.org/keywords/charge-pump","display_name":"Charge pump","score":0.31795093417167664},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.21654191613197327},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18676578998565674},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14366093277931213},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10391867160797119}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.9147346019744873},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.6341125965118408},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.5584012866020203},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5087957978248596},{"id":"https://openalex.org/C2776158855","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase frequency detector","level":5,"score":0.5013613700866699},{"id":"https://openalex.org/C174839445","wikidata":"https://www.wikidata.org/wiki/Q1134386","display_name":"Lock (firearm)","level":2,"score":0.4773438274860382},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45972129702568054},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.4296380579471588},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.42343825101852417},{"id":"https://openalex.org/C114825011","wikidata":"https://www.wikidata.org/wiki/Q440704","display_name":"Charge pump","level":4,"score":0.31795093417167664},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.21654191613197327},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18676578998565674},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14366093277931213},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10391867160797119},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/mixdes.2019.8787120","is_oa":false,"landing_page_url":"https://doi.org/10.23919/mixdes.2019.8787120","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1970492126","https://openalex.org/W2003473732","https://openalex.org/W2034525900","https://openalex.org/W2070413034","https://openalex.org/W2102689423","https://openalex.org/W2131325068","https://openalex.org/W2132897890","https://openalex.org/W2147390479","https://openalex.org/W2177274792","https://openalex.org/W2760859760"],"related_works":["https://openalex.org/W2936029881","https://openalex.org/W2369807905","https://openalex.org/W4385624389","https://openalex.org/W2979324006","https://openalex.org/W2295601265","https://openalex.org/W2148370333","https://openalex.org/W4381745543","https://openalex.org/W2908219865","https://openalex.org/W2087564251","https://openalex.org/W3177439118"],"abstract_inverted_index":{"A":[0],"half-rate":[1,10,18,51],"CDR":[2,100],"architecture":[3],"is":[4,91,126,166],"presented":[5],"which":[6],"exploits":[7],"an":[8],"improved":[9],"Linear":[11],"Phase":[12],"Detector":[13,132],"(LPD)":[14],"and":[15,38,44,62,124,145,162,176],"a":[16,26,56,129],"proposed":[17,50,130],"Multi-Level":[19],"Bang":[20,21],"PD":[22,28],"(MLBBPD)":[23],"incorporated":[24],"in":[25,53,173],"Composite":[27],"(CPD)":[29],"to":[30,72,103,116,157],"benefit":[31],"the":[32,36,60,66,79,96,99,110,113,122,135,139,143,146,152,155,164,177],"advantages":[33],"of":[34,82],"both":[35],"MLBBPD":[37,97,123,156],"LPD":[39,52,111,125,165],"such":[40],"as":[41],"fast":[42,104],"locking":[43],"good":[45],"jitter":[46,118],"performance,":[47],"respectively.":[48],"The":[49],"contrast":[54],"with":[55,65],"conventional":[57],"counterpart":[58],"generates":[59],"error":[61],"reference":[63],"signals":[64],"equivalent":[67],"pulse":[68],"width,":[69],"thus":[70],"obviating":[71],"employ":[73],"asymmetric":[74],"charge":[75],"pump,":[76],"also":[77],"relaxes":[78],"speed":[80],"requirement":[81],"other":[83],"related":[84],"circuits.":[85],"Finally,":[86],"its":[87],"systematic":[88],"phase":[89,140],"offset":[90],"zero.":[92],"During":[93],"lock":[94,105],"acquisition,":[95],"controls":[98],"loop":[101,114],"due":[102],"time.":[106],"At":[107,134],"locked":[108,136],"state,":[109,137],"establishes":[112],"owing":[115],"better":[117],"operation.":[119],"Switching":[120],"between":[121,142],"performed":[127],"through":[128],"Lock":[131],"(LD).":[133],"if":[138],"difference":[141],"data":[144],"clock":[147],"be":[148],"greater":[149],"than":[150],"45,":[151,161],"LD":[153],"selects":[154],"decrease":[158],"it":[159],"below":[160],"again":[163],"selected.":[167],"Simulations":[168],"accomplished":[169],"by":[170],"Verilog-AMS":[171],"model":[172],"HSPICE-RF":[174],"simulator":[175],"results":[178],"confirm":[179],"our":[180],"statements.":[181]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
