{"id":"https://openalex.org/W2885828488","doi":"https://doi.org/10.23919/mixdes.2018.8436880","title":"Parallel Critical Path Tracing Fault Simulation in Sequential Circuits","display_name":"Parallel Critical Path Tracing Fault Simulation in Sequential Circuits","publication_year":2018,"publication_date":"2018-06-01","ids":{"openalex":"https://openalex.org/W2885828488","doi":"https://doi.org/10.23919/mixdes.2018.8436880","mag":"2885828488"},"language":"en","primary_location":{"id":"doi:10.23919/mixdes.2018.8436880","is_oa":false,"landing_page_url":"https://doi.org/10.23919/mixdes.2018.8436880","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006166007","display_name":"Jaak K\u00f5usaar","orcid":null},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":true,"raw_author_name":"Jaak Kousaar","raw_affiliation_strings":["Department of Computer Engineering, Tallinn University of Technology, Tallinn, Estonia"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Tallinn University of Technology, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010536057","display_name":"Raimund Ubar","orcid":"https://orcid.org/0000-0001-8186-4385"},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Raimund Ubar","raw_affiliation_strings":["Department of Computer Engineering, Tallinn University of Technology, Tallinn, Estonia"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Tallinn University of Technology, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072185940","display_name":"Sergei Kostin","orcid":null},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Sergei Kostin","raw_affiliation_strings":["Department of Computer Engineering, Tallinn University of Technology, Tallinn, Estonia"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Tallinn University of Technology, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054970559","display_name":"Sergei Devadze","orcid":"https://orcid.org/0000-0001-7445-3801"},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Sergei Devadze","raw_affiliation_strings":["Department of Computer Engineering, Tallinn University of Technology, Tallinn, Estonia"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Tallinn University of Technology, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010286547","display_name":"Jaan Raik","orcid":"https://orcid.org/0000-0001-8113-020X"},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Jaan Raik","raw_affiliation_strings":["Department of Computer Engineering, Tallinn University of Technology, Tallinn, Estonia"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Tallinn University of Technology, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5006166007"],"corresponding_institution_ids":["https://openalex.org/I111112146"],"apc_list":null,"apc_paid":null,"fwci":0.2525,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.49682229,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"305","last_page":"310"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.7944037914276123},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.7222091555595398},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6890876293182373},{"id":"https://openalex.org/keywords/fault-simulator","display_name":"Fault Simulator","score":0.6685633659362793},{"id":"https://openalex.org/keywords/tracing","display_name":"Tracing","score":0.63099205493927},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6089449524879456},{"id":"https://openalex.org/keywords/stuck-at-fault","display_name":"Stuck-at fault","score":0.5900236964225769},{"id":"https://openalex.org/keywords/path-tracing","display_name":"Path tracing","score":0.5655684471130371},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.5285614728927612},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.47113317251205444},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.46709081530570984},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.45672422647476196},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.4219539761543274},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.37560001015663147},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3595861792564392},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.25594818592071533},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1522432267665863},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.07702776789665222}],"concepts":[{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.7944037914276123},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.7222091555595398},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6890876293182373},{"id":"https://openalex.org/C2776365744","wikidata":"https://www.wikidata.org/wiki/Q5438149","display_name":"Fault Simulator","level":5,"score":0.6685633659362793},{"id":"https://openalex.org/C138673069","wikidata":"https://www.wikidata.org/wiki/Q322229","display_name":"Tracing","level":2,"score":0.63099205493927},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6089449524879456},{"id":"https://openalex.org/C13625343","wikidata":"https://www.wikidata.org/wiki/Q7627418","display_name":"Stuck-at fault","level":4,"score":0.5900236964225769},{"id":"https://openalex.org/C110541219","wikidata":"https://www.wikidata.org/wiki/Q72948","display_name":"Path tracing","level":3,"score":0.5655684471130371},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.5285614728927612},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.47113317251205444},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.46709081530570984},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.45672422647476196},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.4219539761543274},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.37560001015663147},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3595861792564392},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.25594818592071533},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1522432267665863},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.07702776789665222},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C205711294","wikidata":"https://www.wikidata.org/wiki/Q176953","display_name":"Rendering (computer graphics)","level":2,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/mixdes.2018.8436880","is_oa":false,"landing_page_url":"https://doi.org/10.23919/mixdes.2018.8436880","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W2021218329","https://openalex.org/W2028921662","https://openalex.org/W2057301315","https://openalex.org/W2069246068","https://openalex.org/W2124618076","https://openalex.org/W2152406824","https://openalex.org/W2155389389","https://openalex.org/W2161792710","https://openalex.org/W3014325818","https://openalex.org/W3144136025","https://openalex.org/W4240513729","https://openalex.org/W4252337063","https://openalex.org/W6662307717","https://openalex.org/W6662930111"],"related_works":["https://openalex.org/W2149684986","https://openalex.org/W2542800311","https://openalex.org/W2118423280","https://openalex.org/W4251740953","https://openalex.org/W1988246374","https://openalex.org/W2142519941","https://openalex.org/W4246237793","https://openalex.org/W2885828488","https://openalex.org/W2136209080","https://openalex.org/W2158452378"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3],"present":[4],"a":[5],"very":[6],"fast":[7],"fault":[8,75,86,99],"simulation":[9,76,87,100],"method":[10,77],"for":[11,28,40,56,79],"sequential":[12,35,80,92,102],"circuits,":[13,103],"which":[14,53,60,104],"is":[15,105],"based":[16],"on":[17],"accommodation":[18],"of":[19,34,44,66,98],"exact":[20],"parallel":[21,41],"critical":[22],"path":[23],"tracing":[24],"in":[25,32,101],"combinational":[26,57,90],"circuits":[27],"using":[29],"it":[30],"also":[31],"case":[33],"circuits.":[36,81],"Formulas":[37],"are":[38,54,61],"developed":[39],"on-line":[42],"analysis":[43],"the":[45,89],"faults":[46,67],"to":[47,69,85],"classify":[48],"them":[49],"into":[50],"two":[51,83],"classes,":[52],"eligible":[55],"simulation,":[58],"and":[59,91],"not.":[62],"The":[63],"latter":[64],"class":[65],"has":[68],"be":[70],"simulated":[71],"by":[72,107],"any":[73],"conventional":[74],"used":[78],"Combining":[82],"approaches":[84],"-":[88,94],"ones":[93],"allows":[95],"dramatic":[96],"speed-up":[97],"demonstrated":[106],"experimental":[108],"results.":[109]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
