{"id":"https://openalex.org/W2761973445","doi":"https://doi.org/10.23919/fpl.2017.8056860","title":"A pythonic approach for rapid hardware prototyping and instrumentation","display_name":"A pythonic approach for rapid hardware prototyping and instrumentation","publication_year":2017,"publication_date":"2017-09-01","ids":{"openalex":"https://openalex.org/W2761973445","doi":"https://doi.org/10.23919/fpl.2017.8056860","mag":"2761973445"},"language":"en","primary_location":{"id":"doi:10.23919/fpl.2017.8056860","is_oa":false,"landing_page_url":"https://doi.org/10.23919/fpl.2017.8056860","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 27th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083811472","display_name":"John E. Clow","orcid":null},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John Clow","raw_affiliation_strings":["University of California, Santa Barbara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Santa Barbara, CA, USA","institution_ids":["https://openalex.org/I154570441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019627345","display_name":"Georgios Tzimpragos","orcid":"https://orcid.org/0000-0002-0127-4703"},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Georgios Tzimpragos","raw_affiliation_strings":["University of California, Santa Barbara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Santa Barbara, CA, USA","institution_ids":["https://openalex.org/I154570441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077343167","display_name":"Deeksha Dangwal","orcid":"https://orcid.org/0000-0002-1259-426X"},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Deeksha Dangwal","raw_affiliation_strings":["University of California, Santa Barbara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Santa Barbara, CA, USA","institution_ids":["https://openalex.org/I154570441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057191546","display_name":"Sammy Guo","orcid":null},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sammy Guo","raw_affiliation_strings":["University of California, Santa Barbara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Santa Barbara, CA, USA","institution_ids":["https://openalex.org/I154570441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000084643","display_name":"Joseph McMahan","orcid":null},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Joseph McMahan","raw_affiliation_strings":["University of California, Santa Barbara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Santa Barbara, CA, USA","institution_ids":["https://openalex.org/I154570441"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036932071","display_name":"Timothy Sherwood","orcid":"https://orcid.org/0000-0002-6550-6075"},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Timothy Sherwood","raw_affiliation_strings":["University of California, Santa Barbara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Santa Barbara, CA, USA","institution_ids":["https://openalex.org/I154570441"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I154570441"],"apc_list":null,"apc_paid":null,"fwci":3.8039,"has_fulltext":false,"cited_by_count":60,"citation_normalized_percentile":{"value":0.95631825,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9922999739646912,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7831950187683105},{"id":"https://openalex.org/keywords/python","display_name":"Python (programming language)","score":0.6925599575042725},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6582239866256714},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.6170072555541992},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5636364221572876},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5248684287071228},{"id":"https://openalex.org/keywords/rapid-prototyping","display_name":"Rapid prototyping","score":0.5138781070709229},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5027256011962891},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.49194833636283875},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.4520038962364197},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.43841299414634705},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.40821826457977295}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7831950187683105},{"id":"https://openalex.org/C519991488","wikidata":"https://www.wikidata.org/wiki/Q28865","display_name":"Python (programming language)","level":2,"score":0.6925599575042725},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6582239866256714},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.6170072555541992},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5636364221572876},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5248684287071228},{"id":"https://openalex.org/C2780395129","wikidata":"https://www.wikidata.org/wiki/Q1128971","display_name":"Rapid prototyping","level":2,"score":0.5138781070709229},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5027256011962891},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.49194833636283875},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.4520038962364197},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.43841299414634705},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.40821826457977295},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/fpl.2017.8056860","is_oa":false,"landing_page_url":"https://doi.org/10.23919/fpl.2017.8056860","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 27th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"display_name":"Quality Education","id":"https://metadata.un.org/sdg/4"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W142217541","https://openalex.org/W1589266946","https://openalex.org/W1864032062","https://openalex.org/W1963965124","https://openalex.org/W1983394510","https://openalex.org/W1992148609","https://openalex.org/W1999129135","https://openalex.org/W2047226031","https://openalex.org/W2079751107","https://openalex.org/W2131129639","https://openalex.org/W2134633067","https://openalex.org/W2141955346","https://openalex.org/W2143242007","https://openalex.org/W2144512449","https://openalex.org/W2604254497","https://openalex.org/W2612093424","https://openalex.org/W4249144718","https://openalex.org/W4250759488","https://openalex.org/W6638769890","https://openalex.org/W6737776912"],"related_works":["https://openalex.org/W2110818533","https://openalex.org/W1917852300","https://openalex.org/W2384838054","https://openalex.org/W2139058049","https://openalex.org/W2376018793","https://openalex.org/W2548456620","https://openalex.org/W2911649771","https://openalex.org/W1843355381","https://openalex.org/W1492116303","https://openalex.org/W2069295582"],"abstract_inverted_index":{"We":[0,85],"introduce":[1],"PyRTL,":[2],"a":[3,23,30,33,40,81,89],"Python":[4,61],"embedded":[5],"hardware":[6,16,45,117],"design":[7,25,46,65,105],"language":[8,58],"that":[9,42],"helps":[10],"concisely":[11],"and":[12,48,71,78,98,107,135],"precisely":[13],"describe":[14,86],"digital":[15,44],"structures.":[17],"Rather":[18],"than":[19],"attempt":[20],"to":[21,62,67,102],"infer":[22],"good":[24],"via":[26],"HLS,":[27],"PyRTL":[28,87],"provides":[29,126],"wrapper":[31],"over":[32,80],"well-defined":[34],"\"core\"":[35],"set":[36],"of":[37,55,60,76,115,137],"primitives":[38],"in":[39],"way":[41],"empowers":[43],"teaching":[47],"research.":[49],"The":[50,123],"proposed":[51],"system":[52,125],"takes":[53],"advantage":[54],"the":[56,73,94,113,133],"programming":[57],"features":[59],"allow":[63],"interesting":[64],"patterns":[66,106],"be":[68],"expressed":[69],"succinctly,":[70],"encourage":[72],"rapid":[74],"generation":[75,96],"tooling":[77],"transforms":[79],"custom":[82],"intermediate":[83],"representation.":[84],"as":[88],"language,":[90],"its":[91,100],"core":[92],"semantics,":[93],"transform":[95],"interface,":[97],"explore":[99],"application":[101],"several":[103],"different":[104],"analysis":[108],"tools.":[109],"Also,":[110],"we":[111],"demonstrate":[112],"integration":[114],"PyRTL-generated":[116],"overlays":[118],"into":[119],"Xilinx":[120],"PYNQ":[121],"platform.":[122],"resulting":[124],"an":[127],"almost":[128],"\"pure\"":[129],"pythonic":[130],"experience":[131],"for":[132],"prototyping":[134],"evaluation":[136],"FPGA-based":[138],"SoCs.":[139]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":12},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":8},{"year":2020,"cited_by_count":12},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":3}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}