{"id":"https://openalex.org/W2762731442","doi":"https://doi.org/10.23919/fpl.2017.8056756","title":"Evaluating high-level design strategies on FPGAs for high-performance computing","display_name":"Evaluating high-level design strategies on FPGAs for high-performance computing","publication_year":2017,"publication_date":"2017-09-01","ids":{"openalex":"https://openalex.org/W2762731442","doi":"https://doi.org/10.23919/fpl.2017.8056756","mag":"2762731442"},"language":"en","primary_location":{"id":"doi:10.23919/fpl.2017.8056756","is_oa":false,"landing_page_url":"https://doi.org/10.23919/fpl.2017.8056756","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 27th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035985391","display_name":"Artur Podobas","orcid":"https://orcid.org/0000-0001-5452-6794"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Artur Podobas","raw_affiliation_strings":["Tokyo Institute of Technology"],"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073830951","display_name":"Hamid Reza Zohouri","orcid":null},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hamid Reza Zohouri","raw_affiliation_strings":["Tokyo Institute of Technology"],"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035025604","display_name":"Naoya Maruyama","orcid":null},"institutions":[{"id":"https://openalex.org/I4210129730","display_name":"RIKEN Center for Computational Science","ror":"https://ror.org/03r519674","country_code":"JP","type":"facility","lineage":["https://openalex.org/I4210110652","https://openalex.org/I4210129730"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Naoya Maruyama","raw_affiliation_strings":["Riken Advanced Institute for Computational Science"],"affiliations":[{"raw_affiliation_string":"Riken Advanced Institute for Computational Science","institution_ids":["https://openalex.org/I4210129730"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100634486","display_name":"Satoshi Matsuoka","orcid":"https://orcid.org/0000-0003-1910-8532"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Satoshi Matsuoka","raw_affiliation_strings":["Tokyo Institute of Technology"],"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology","institution_ids":["https://openalex.org/I114531698"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5035985391"],"corresponding_institution_ids":["https://openalex.org/I114531698"],"apc_list":null,"apc_paid":null,"fwci":1.6181,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.85302926,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.827002763748169},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7389086484909058},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6593034267425537},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.6471577882766724},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5651611685752869},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5432523488998413},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.5257980227470398},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.518073320388794},{"id":"https://openalex.org/keywords/supercomputer","display_name":"Supercomputer","score":0.476418137550354},{"id":"https://openalex.org/keywords/suite","display_name":"Suite","score":0.4488365054130554},{"id":"https://openalex.org/keywords/programming-paradigm","display_name":"Programming paradigm","score":0.43626856803894043},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4329397678375244},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.42916348576545715},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.42579105496406555},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2918349504470825},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.13963988423347473}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.827002763748169},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7389086484909058},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6593034267425537},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.6471577882766724},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5651611685752869},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5432523488998413},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5257980227470398},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.518073320388794},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.476418137550354},{"id":"https://openalex.org/C79581498","wikidata":"https://www.wikidata.org/wiki/Q1367530","display_name":"Suite","level":2,"score":0.4488365054130554},{"id":"https://openalex.org/C34165917","wikidata":"https://www.wikidata.org/wiki/Q188267","display_name":"Programming paradigm","level":2,"score":0.43626856803894043},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4329397678375244},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.42916348576545715},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.42579105496406555},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2918349504470825},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.13963988423347473},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C166957645","wikidata":"https://www.wikidata.org/wiki/Q23498","display_name":"Archaeology","level":1,"score":0.0},{"id":"https://openalex.org/C95457728","wikidata":"https://www.wikidata.org/wiki/Q309","display_name":"History","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.23919/fpl.2017.8056756","is_oa":false,"landing_page_url":"https://doi.org/10.23919/fpl.2017.8056756","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 27th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},{"id":"pmh:oai:t2r2.star.titech.ac.jp:50420971","is_oa":false,"landing_page_url":"http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100770466","pdf_url":null,"source":{"id":"https://openalex.org/S4377196385","display_name":"Tokyo Tech Research Repository (Tokyo Institute of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I114531698","host_organization_name":"Tokyo Institute of Technology","host_organization_lineage":["https://openalex.org/I114531698"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Conference Paper"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8100000023841858,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320334764","display_name":"Japan Society for the Promotion of Science","ror":"https://ror.org/00hhkn466"},{"id":"https://openalex.org/F4320338075","display_name":"Core Research for Evolutional Science and Technology","ror":"https://ror.org/00097mb19"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1967643283","https://openalex.org/W1995207020","https://openalex.org/W2000921084","https://openalex.org/W2008991261","https://openalex.org/W2018055497","https://openalex.org/W2080592089","https://openalex.org/W2097537332","https://openalex.org/W2116514950","https://openalex.org/W2152944133","https://openalex.org/W2343695530","https://openalex.org/W2470874542","https://openalex.org/W2472500612","https://openalex.org/W4246362357","https://openalex.org/W4252821989"],"related_works":["https://openalex.org/W2384867379","https://openalex.org/W4321442002","https://openalex.org/W2015265939","https://openalex.org/W2284072287","https://openalex.org/W4400094300","https://openalex.org/W2611067230","https://openalex.org/W2329539859","https://openalex.org/W2480201319","https://openalex.org/W2227905990","https://openalex.org/W2490611454"],"abstract_inverted_index":{"Field-Programmable":[0],"Gate":[1],"Arrays":[2],"(FPGAs)":[3],"are":[4,38],"gaining":[5],"considerable":[6],"momentum":[7],"in":[8,12,61,71,95,147],"mainstream":[9],"high-performance":[10,72],"systems":[11,78,90],"recent":[13],"years":[14],"due":[15,31],"to":[16,28,32,40,57,68,109,156,168,171,186],"their":[17],"flexibility":[18],"and":[19,34,79,99,101,114],"low":[20],"power":[21],"consumption.":[22],"Still,":[23],"FPGAs":[24,58,70],"remain":[25],"largely":[26],"unavailable":[27],"software":[29,49],"programmers":[30],"programming":[33,97],"debugging":[35],"difficulties":[36],"that":[37,47,126],"inherent":[39],"standard":[41],"Hardware":[42],"Description":[43],"Languages.":[44],"The":[45,89],"performance":[46,137,153,189],"hardware-oblivious":[48],"engineers":[50],"can":[51],"expect":[52],"from":[53,84,103],"migrating":[54],"legacy":[55],"code":[56],"remains":[59],"shrouded":[60],"mystery.":[62],"To":[63],"gain":[64],"insight":[65],"on":[66],"how":[67],"use":[69],"computing,":[73],"we":[74,91,150,161],"created":[75],"four":[76],"different":[77],"evaluated":[80,92],"them":[81],"using":[82,112,118],"benchmarks":[83],"the":[85,127,140,148],"Rodinia":[86],"benchmark":[87],"suite.":[88],"were":[93],"diverse":[94],"both":[96],"model":[98],"generality,":[100],"range":[102],"a":[104],"custom-built":[105],"30-core":[106],"manycore":[107,184],"system":[108,185],"FSM-based":[110],"accelerators":[111],"LegUP":[113],"deep":[115],"data-flow":[116],"pipelines":[117],"Intel":[119,163],"FPGA":[120,164],"SDK":[121,165],"for":[122,166],"OpenCL.":[123],"We":[124,179],"found":[125,162,181],"original":[128],"version":[129],"of":[130,139,174],"LegUp":[131],"does":[132],"not":[133],"achieve":[134],"very":[135],"good":[136],"out":[138],"box;":[141],"still,":[142],"with":[143,190],"some":[144],"non-trivial":[145],"modification":[146],"architecture,":[149],"improved":[151],"its":[152],"by":[154],"up":[155,170],"10":[157],"times.":[158],"Despite":[159],"this,":[160],"OpenCL":[167],"perform":[169],"two":[172],"orders":[173],"magnitude":[175],"faster":[176],"than":[177],"LegUp.":[178,191],"also":[180],"our":[182],"general-purpose":[183],"have":[187],"comparable":[188]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":6},{"year":2018,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
