{"id":"https://openalex.org/W2909040172","doi":"https://doi.org/10.23919/fmcad.2018.8603014","title":"CoSA: Integrated Verification for Agile Hardware Design","display_name":"CoSA: Integrated Verification for Agile Hardware Design","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2909040172","doi":"https://doi.org/10.23919/fmcad.2018.8603014","mag":"2909040172"},"language":"en","primary_location":{"id":"doi:10.23919/fmcad.2018.8603014","is_oa":false,"landing_page_url":"https://doi.org/10.23919/fmcad.2018.8603014","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 Formal Methods in Computer Aided Design (FMCAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023931839","display_name":"Cristian Mattarei","orcid":"https://orcid.org/0000-0001-5050-896X"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Cristian Mattarei","raw_affiliation_strings":["Stanford University, Stanford, California, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, Stanford, California, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059144582","display_name":"Makai Mann","orcid":"https://orcid.org/0000-0002-1555-5784"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Makai Mann","raw_affiliation_strings":["Stanford University, Stanford, California, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, Stanford, California, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026961968","display_name":"Clark Barrett","orcid":"https://orcid.org/0000-0002-9522-3084"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Clark Barrett","raw_affiliation_strings":["Stanford University, Stanford, California, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, Stanford, California, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053157520","display_name":"Ross Daly","orcid":"https://orcid.org/0000-0002-4938-5250"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ross G. Daly","raw_affiliation_strings":["Stanford University, Stanford, California, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, Stanford, California, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052101520","display_name":"Dillon Huff","orcid":"https://orcid.org/0000-0001-9055-3490"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dillon Huff","raw_affiliation_strings":["Stanford University, Stanford, California, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, Stanford, California, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018111215","display_name":"Pat Hanrahan","orcid":"https://orcid.org/0000-0002-3474-9752"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pat Hanrahan","raw_affiliation_strings":["Stanford University, Stanford, California, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, Stanford, California, USA","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5023931839"],"corresponding_institution_ids":["https://openalex.org/I97018004"],"apc_list":null,"apc_paid":null,"fwci":2.7729,"has_fulltext":false,"cited_by_count":32,"citation_normalized_percentile":{"value":0.9185972,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8183847665786743},{"id":"https://openalex.org/keywords/formal-equivalence-checking","display_name":"Formal equivalence checking","score":0.7205793261528015},{"id":"https://openalex.org/keywords/satisfiability-modulo-theories","display_name":"Satisfiability modulo theories","score":0.6652733683586121},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.6510652303695679},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.6338647603988647},{"id":"https://openalex.org/keywords/model-checking","display_name":"Model checking","score":0.5532931685447693},{"id":"https://openalex.org/keywords/liveness","display_name":"Liveness","score":0.5156728029251099},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.4994058609008789},{"id":"https://openalex.org/keywords/symbolic-execution","display_name":"Symbolic execution","score":0.45664212107658386},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.4373217225074768},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.40772324800491333},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.19109907746315002},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.17506143450737},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.15813905000686646}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8183847665786743},{"id":"https://openalex.org/C96654402","wikidata":"https://www.wikidata.org/wiki/Q5469962","display_name":"Formal equivalence checking","level":3,"score":0.7205793261528015},{"id":"https://openalex.org/C164155591","wikidata":"https://www.wikidata.org/wiki/Q2067766","display_name":"Satisfiability modulo theories","level":2,"score":0.6652733683586121},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.6510652303695679},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.6338647603988647},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.5532931685447693},{"id":"https://openalex.org/C15569618","wikidata":"https://www.wikidata.org/wiki/Q3561421","display_name":"Liveness","level":2,"score":0.5156728029251099},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.4994058609008789},{"id":"https://openalex.org/C2779639559","wikidata":"https://www.wikidata.org/wiki/Q7661178","display_name":"Symbolic execution","level":3,"score":0.45664212107658386},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.4373217225074768},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.40772324800491333},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.19109907746315002},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.17506143450737},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.15813905000686646}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/fmcad.2018.8603014","is_oa":false,"landing_page_url":"https://doi.org/10.23919/fmcad.2018.8603014","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 Formal Methods in Computer Aided Design (FMCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.47999998927116394,"display_name":"Peace, Justice and strong institutions","id":"https://metadata.un.org/sdg/16"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W233122475","https://openalex.org/W1481397690","https://openalex.org/W1495266209","https://openalex.org/W1503170978","https://openalex.org/W1510368738","https://openalex.org/W1512310098","https://openalex.org/W1528837436","https://openalex.org/W1576151803","https://openalex.org/W1583869287","https://openalex.org/W1787074469","https://openalex.org/W2055312318","https://openalex.org/W2159595840","https://openalex.org/W2564028299","https://openalex.org/W2884110986","https://openalex.org/W3163735934","https://openalex.org/W4233276969","https://openalex.org/W4251637954","https://openalex.org/W6609061849","https://openalex.org/W6628836516","https://openalex.org/W6629648295","https://openalex.org/W6630511988","https://openalex.org/W6634527239","https://openalex.org/W6683303659","https://openalex.org/W6753595352","https://openalex.org/W6795530021","https://openalex.org/W6828535928"],"related_works":["https://openalex.org/W2883123122","https://openalex.org/W2287565210","https://openalex.org/W2184716478","https://openalex.org/W2599631825","https://openalex.org/W2143744897","https://openalex.org/W2399578172","https://openalex.org/W4210813503","https://openalex.org/W3083162932","https://openalex.org/W1992485833","https://openalex.org/W4321434118"],"abstract_inverted_index":{"Symbolic":[0,57],"model-checking":[1,60,75],"is":[2,40,66,104,146],"a":[3,44,59,67,132],"well-established":[4],"technique":[5],"used":[6],"in":[7,43,115,150],"hardware":[8,45],"design":[9],"to":[10,117,120],"assess,":[11],"and":[12,28,101,109,130,140,142,148],"formally":[13],"verify,":[14],"functional":[15],"correctness.":[16],"However,":[17],"most":[18],"modern":[19],"model-checkers":[20],"encode":[21],"the":[22,36,97],"problem":[23],"into":[24,77],"propositional":[25],"satisfiability":[26],"(SAT)":[27],"do":[29],"not":[30],"leverage":[31,112],"any":[32],"additional":[33],"information":[34],"beyond":[35],"input":[37,128],"design,":[38],"which":[39],"typically":[41],"provided":[42],"description":[46],"language":[47],"such":[48],"as":[49],"Verilog.In":[50],"this":[51],"paper,":[52],"we":[53],"present":[54],"CoSA":[55,73,103,125,145],"(CoreIR":[56],"Analyzer),":[58],"tool":[61],"for":[62,71],"CoreIR":[63,65,108],"designs.":[64],"new":[68],"intermediate":[69],"representation":[70],"hardware.":[72],"encodes":[74],"queries":[76],"first-order":[78],"formulas":[79],"that":[80],"can":[81,110],"be":[82],"solved":[83],"by":[84],"Satisfiability":[85],"Modulo":[86],"Theories":[87],"(SMT)":[88],"solvers.":[89],"In":[90],"particular,":[91],"it":[92,153],"natively":[93],"supports":[94,126],"encodings":[95],"using":[96],"theories":[98],"of":[99,135],"bitvectors":[100],"arrays.":[102],"closely":[105],"integrated":[106],"with":[107,122],"thus":[111],"CoreIR-generated":[113],"metadata":[114],"addition":[116],"user-provided":[118],"lemmas":[119],"assist":[121],"formal":[123],"verification.":[124,144],"multiple":[127],"formats":[129],"provides":[131],"broad":[133],"set":[134],"analyses":[136],"including":[137],"equivalence":[138],"checking":[139],"safety":[141],"liveness":[143],"open-source":[147],"written":[149],"Python,":[151],"making":[152],"easily":[154],"extendable.":[155]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":7},{"year":2019,"cited_by_count":1}],"updated_date":"2026-03-12T08:34:05.389933","created_date":"2025-10-10T00:00:00"}