{"id":"https://openalex.org/W2767430642","doi":"https://doi.org/10.23919/fmcad.2017.8102251","title":"Property directed reachability with word-level abstraction","display_name":"Property directed reachability with word-level abstraction","publication_year":2017,"publication_date":"2017-10-01","ids":{"openalex":"https://openalex.org/W2767430642","doi":"https://doi.org/10.23919/fmcad.2017.8102251","mag":"2767430642"},"language":"en","primary_location":{"id":"doi:10.23919/fmcad.2017.8102251","is_oa":false,"landing_page_url":"https://doi.org/10.23919/fmcad.2017.8102251","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 Formal Methods in Computer Aided Design (FMCAD)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064239570","display_name":"Yen-Sheng Ho","orcid":null},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yen-Sheng Ho","raw_affiliation_strings":["University of California, Berkeley"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Berkeley","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110450560","display_name":"Alan Mishchenko","orcid":"https://orcid.org/0009-0004-1303-6261"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Alan Mishchenko","raw_affiliation_strings":["University of California, Berkeley"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Berkeley","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064568178","display_name":"Robert K. Brayton","orcid":"https://orcid.org/0000-0002-3861-1718"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Robert Brayton","raw_affiliation_strings":["University of California, Berkeley"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Berkeley","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I95457486"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"132","last_page":"139"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9923999905586243,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12423","display_name":"Software Reliability and Analysis Research","score":0.9919000267982483,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reachability","display_name":"Reachability","score":0.9143612384796143},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8050863742828369},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.7633364796638489},{"id":"https://openalex.org/keywords/word","display_name":"Word (group theory)","score":0.6673595905303955},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.551362156867981},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5480695366859436},{"id":"https://openalex.org/keywords/property","display_name":"Property (philosophy)","score":0.5471970438957214},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4961257874965668},{"id":"https://openalex.org/keywords/reachability-problem","display_name":"Reachability problem","score":0.48442700505256653},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.47951796650886536},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.474097341299057},{"id":"https://openalex.org/keywords/model-checking","display_name":"Model checking","score":0.4737996459007263},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3804062306880951},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.36729180812835693},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.16125842928886414},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.07899945974349976},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.07039570808410645}],"concepts":[{"id":"https://openalex.org/C136643341","wikidata":"https://www.wikidata.org/wiki/Q1361526","display_name":"Reachability","level":2,"score":0.9143612384796143},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8050863742828369},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.7633364796638489},{"id":"https://openalex.org/C90805587","wikidata":"https://www.wikidata.org/wiki/Q10944557","display_name":"Word (group theory)","level":2,"score":0.6673595905303955},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.551362156867981},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5480695366859436},{"id":"https://openalex.org/C189950617","wikidata":"https://www.wikidata.org/wiki/Q937228","display_name":"Property (philosophy)","level":2,"score":0.5471970438957214},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4961257874965668},{"id":"https://openalex.org/C2777669093","wikidata":"https://www.wikidata.org/wiki/Q17141570","display_name":"Reachability problem","level":3,"score":0.48442700505256653},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.47951796650886536},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.474097341299057},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.4737996459007263},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3804062306880951},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.36729180812835693},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.16125842928886414},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.07899945974349976},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.07039570808410645},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/fmcad.2017.8102251","is_oa":false,"landing_page_url":"https://doi.org/10.23919/fmcad.2017.8102251","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 Formal Methods in Computer Aided Design (FMCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5899999737739563,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W312542757","https://openalex.org/W1495266209","https://openalex.org/W1503575278","https://openalex.org/W1518705996","https://openalex.org/W1525907025","https://openalex.org/W1528837436","https://openalex.org/W1644782203","https://openalex.org/W1787074469","https://openalex.org/W2026120465","https://openalex.org/W2038283820","https://openalex.org/W2046856905","https://openalex.org/W2115383281","https://openalex.org/W2118791871","https://openalex.org/W2155938123","https://openalex.org/W2164829820","https://openalex.org/W2186626863","https://openalex.org/W2295848463","https://openalex.org/W3138459719","https://openalex.org/W4250467866","https://openalex.org/W4254033710","https://openalex.org/W4302599276","https://openalex.org/W6630065971","https://openalex.org/W6631227289","https://openalex.org/W6662350437"],"related_works":["https://openalex.org/W2884574904","https://openalex.org/W4253760428","https://openalex.org/W2047831585","https://openalex.org/W3208672221","https://openalex.org/W3017277461","https://openalex.org/W2099490078","https://openalex.org/W4287199681","https://openalex.org/W3172202899","https://openalex.org/W4224983736","https://openalex.org/W4389158950"],"abstract_inverted_index":{"SAT-based":[0],"Property":[1],"Directed":[2],"Reachability":[3],"(PDR)":[4],"has":[5],"become":[6],"the":[7,106],"key":[8],"algorithmic":[9],"development":[10],"for":[11],"unbounded":[12],"model":[13],"checking":[14],"of":[15,47,79,92],"gate-level":[16],"sequential":[17],"circuits,":[18],"but":[19],"it":[20],"can":[21],"be":[22],"inefficient":[23],"when":[24],"applied":[25],"to":[26,105,110],"word-level":[27,37,59,113],"problems":[28,103],"with":[29,49],"heavy":[30],"arithmetic":[31],"logic.":[32],"To":[33],"address":[34],"this":[35],"issue,":[36],"abstraction":[38],"is":[39],"often":[40],"performed":[41],"by":[42],"replacing":[43],"a":[44,58,64,89,111],"whole":[45],"set":[46,91],"signals":[48],"unconstrained":[50],"new":[51],"primary":[52],"inputs.":[53],"This":[54],"paper":[55],"introduces":[56],"PDR-WLA,":[57],"abstraction-refinement":[60,114],"algorithm":[61,69],"integrated":[62],"into":[63],"modified":[65],"PDR":[66,108],"implementation.":[67],"The":[68],"uses":[70],"efficient":[71],"refinement":[72],"and":[73,86,109],"re-uses":[74],"reachability":[75],"information":[76],"across":[77],"iterations":[78],"refinement.":[80],"PDR-WLA":[81],"was":[82],"implemented":[83],"in":[84],"ABC":[85],"evaluated":[87],"on":[88,101],"large":[90],"industrial":[93],"Verilog":[94],"designs.":[95],"Experimental":[96],"results":[97],"show":[98],"significant":[99],"speedups":[100],"hard":[102],"compared":[104],"original":[107],"naive":[112],"method.":[115]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}