{"id":"https://openalex.org/W3185272777","doi":"https://doi.org/10.23919/date51398.2021.9474261","title":"Exploiting FeFETs via Cross-Layer Design from In-memory Computing Circuits to Meta-Learning Applications","display_name":"Exploiting FeFETs via Cross-Layer Design from In-memory Computing Circuits to Meta-Learning Applications","publication_year":2021,"publication_date":"2021-02-01","ids":{"openalex":"https://openalex.org/W3185272777","doi":"https://doi.org/10.23919/date51398.2021.9474261","mag":"3185272777"},"language":"en","primary_location":{"id":"doi:10.23919/date51398.2021.9474261","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date51398.2021.9474261","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064528017","display_name":"Dayane Reis","orcid":"https://orcid.org/0000-0002-8571-1308"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dayane Reis","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053712676","display_name":"Ann Franchesca Laguna","orcid":"https://orcid.org/0000-0001-8267-1040"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ann Franchesca Laguna","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003032564","display_name":"Michael Niemier","orcid":"https://orcid.org/0000-0001-7776-4306"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael Niemier","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100600905","display_name":"Xiaobo Sharon Hu","orcid":"https://orcid.org/0000-0002-6636-9738"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaobo Sharon Hu","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I107639228"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"306","last_page":"311"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7243566513061523},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6058186292648315},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4202212989330292},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.4132581651210785},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32613855600357056},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.23721715807914734},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16113385558128357},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15072184801101685},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.07492536306381226}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7243566513061523},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6058186292648315},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4202212989330292},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.4132581651210785},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32613855600357056},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.23721715807914734},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16113385558128357},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15072184801101685},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.07492536306381226}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/date51398.2021.9474261","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date51398.2021.9474261","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1535414921","https://openalex.org/W2194321275","https://openalex.org/W2331783522","https://openalex.org/W2472819217","https://openalex.org/W2585361384","https://openalex.org/W2601450892","https://openalex.org/W2753160622","https://openalex.org/W2786159202","https://openalex.org/W2792001294","https://openalex.org/W2889210320","https://openalex.org/W2906313120","https://openalex.org/W2945854677","https://openalex.org/W2988640543","https://openalex.org/W3006048143","https://openalex.org/W3035964421","https://openalex.org/W3083144577","https://openalex.org/W3127045726","https://openalex.org/W6702085493","https://openalex.org/W6720057410","https://openalex.org/W6735236233","https://openalex.org/W6743661861","https://openalex.org/W6773648530","https://openalex.org/W6779516005","https://openalex.org/W6790309730"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2382290278","https://openalex.org/W2350741829","https://openalex.org/W2530322880","https://openalex.org/W1596801655","https://openalex.org/W2611005572"],"abstract_inverted_index":{"A":[0],"ferroelectric":[1,8],"FET":[2],"(FeFET),":[3],"made":[4],"by":[5],"integrating":[6],"a":[7,16,19,26,29,92],"material":[9],"layer":[10],"in":[11,91,126],"the":[12,117],"gate":[13],"stack":[14],"of":[15,36,63,119],"MOSFET,":[17],"is":[18,77],"device":[20],"that":[21,86],"can":[22],"behave":[23],"as":[24,130],"both":[25],"transistor":[27],"and":[28,41,45,53,71,75,84,99,136],"non-volatile":[30],"storage":[31],"element.":[32],"This":[33],"unique":[34,61],"property":[35],"FeFETs":[37],"enables":[38],"area":[39],"efficient":[40],"low-power":[42],"merged":[43],"logic":[44],"memory":[46,97],"functionality,":[47],"desirable":[48],"for":[49],"many":[50],"data":[51],"analytic":[52],"machine":[54],"learning":[55],"applications.":[56,114],"To":[57],"best":[58],"exploit":[59],"this":[60],"feature":[62],"FeFETs,":[64],"cross-layer":[65],"design":[66],"practices":[67],"spanning":[68],"from":[69],"circuits":[70,83],"architectures":[72,85],"to":[73,111],"algorithms":[74],"applications":[76],"needed.":[78],"The":[79],"paper":[80],"presents":[81],"FeFET-based":[82],"offer,":[87],"either":[88],"independently":[89],"or":[90],"configurable":[93],"fashion,":[94],"content":[95],"addressable":[96],"(TCAM)":[98],"general-purpose":[100],"compute-in-memory":[101],"(GP-CiM)":[102],"functionalities.":[103],"These":[104],"in-memory":[105,123],"computing":[106,124],"modules":[107],"bring":[108],"new":[109],"opportunities":[110],"accelerating":[112],"data-intensive":[113],"We":[115],"discuss":[116],"use":[118],"these":[120],"FeFET":[121],"based":[122],"fabrics":[125],"meta-learning":[127],"applications,":[128],"specifically":[129],"attentional":[131],"memory.":[132],"System-level":[133],"task":[134],"mapping":[135],"end-to-end":[137],"evaluation":[138],"will":[139],"be":[140],"discussed.":[141]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
