{"id":"https://openalex.org/W3186631150","doi":"https://doi.org/10.23919/date51398.2021.9474156","title":"A Runtime Reconfigurable Design of Compute-in-Memory based Hardware Accelerator","display_name":"A Runtime Reconfigurable Design of Compute-in-Memory based Hardware Accelerator","publication_year":2021,"publication_date":"2021-02-01","ids":{"openalex":"https://openalex.org/W3186631150","doi":"https://doi.org/10.23919/date51398.2021.9474156","mag":"3186631150"},"language":"en","primary_location":{"id":"doi:10.23919/date51398.2021.9474156","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date51398.2021.9474156","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072117537","display_name":"Anni Lu","orcid":"https://orcid.org/0000-0002-4415-0866"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anni Lu","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076031530","display_name":"Xiaochen Peng","orcid":"https://orcid.org/0000-0001-6148-7711"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaochen Peng","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021633981","display_name":"Yandong Luo","orcid":"https://orcid.org/0000-0001-8239-0492"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yandong Luo","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014877058","display_name":"Shanshi Huang","orcid":"https://orcid.org/0000-0002-1760-7656"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shanshi Huang","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054894631","display_name":"Shimeng Yu","orcid":"https://orcid.org/0000-0002-0068-3652"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shimeng Yu","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":1.4164,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.80560233,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"932","last_page":"937"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7805323004722595},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.5708874464035034},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5308265089988708},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5211443901062012},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4918801784515381},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.46490538120269775},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4258015751838684}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7805323004722595},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.5708874464035034},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5308265089988708},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5211443901062012},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4918801784515381},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.46490538120269775},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4258015751838684}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/date51398.2021.9474156","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date51398.2021.9474156","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.9100000262260437,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1686810756","https://openalex.org/W1937359183","https://openalex.org/W2097117768","https://openalex.org/W2163605009","https://openalex.org/W2194775991","https://openalex.org/W2508602506","https://openalex.org/W2518281301","https://openalex.org/W2613989746","https://openalex.org/W2783174608","https://openalex.org/W2794141774","https://openalex.org/W2921918777","https://openalex.org/W2949619037","https://openalex.org/W2955425717","https://openalex.org/W2963163009","https://openalex.org/W2963387357","https://openalex.org/W2963446712","https://openalex.org/W2997869757","https://openalex.org/W2998419091","https://openalex.org/W3005619596","https://openalex.org/W3005839508","https://openalex.org/W3012561096","https://openalex.org/W3015980402","https://openalex.org/W3036663566","https://openalex.org/W6637373629","https://openalex.org/W6684191040","https://openalex.org/W6749781174","https://openalex.org/W6762718338"],"related_works":["https://openalex.org/W1612076744","https://openalex.org/W2152074211","https://openalex.org/W2129019972","https://openalex.org/W1967938402","https://openalex.org/W3164085601","https://openalex.org/W2126857316","https://openalex.org/W1522032972","https://openalex.org/W2386041993","https://openalex.org/W2113308450","https://openalex.org/W2139962137"],"abstract_inverted_index":{"Compute-in-memory":[0],"(CIM)":[1],"is":[2,48,63,83,136],"an":[3],"attractive":[4],"solution":[5],"to":[6,27,39,50,85,158],"address":[7],"the":[8,13,33,57,61,67,118,129,139,160],"\u201cmemory":[9],"wall\u201d":[10],"challenges":[11],"for":[12,138],"extensive":[14],"computation":[15],"in":[16],"machine":[17],"learning":[18],"hardware":[19,62],"accelerators.":[20],"Prior":[21],"CIM-based":[22,81],"architectures,":[23],"though":[24],"can":[25],"adapt":[26],"different":[28,40,142],"neural":[29,91],"network":[30,53],"models":[31,143],"during":[32,54],"design":[34,78,101],"time,":[35],"they":[36],"are":[37,103],"implemented":[38],"custom":[41],"chips.":[42],"Therefore,":[43],"a":[44,51,75,87],"specific":[45,52],"chip":[46,97,165],"instance":[47],"restricted":[49],"runtime.":[55],"However,":[56],"development":[58],"cycle":[59],"of":[60,69,80,89,113,124,141],"normally":[64],"far":[65],"behind":[66],"emergence":[68],"new":[70],"algorithms.":[71],"In":[72],"this":[73],"paper,":[74],"runtime":[76,163],"reconfigurable":[77,106,130],"methodology":[79],"accelerator":[82],"proposed":[84],"support":[86],"class":[88],"convolutional":[90],"networks":[92],"running":[93],"on":[94,146,155],"one":[95],"pre-fabricated":[96],"instance.":[98],"First,":[99],"several":[100],"aspects":[102],"investigated:":[104],"1)":[105],"weight":[107,119],"mapping":[108],"method;":[109],"2)":[110],"input":[111],"side":[112,123],"data":[114,125],"transmission,":[115],"mainly":[116,127],"about":[117,128],"reloading;":[120],"3)":[121],"output":[122],"processing,":[126],"accumulation.":[131],"Then,":[132],"system-level":[133],"performance":[134],"benchmark":[135],"performed":[137],"inference":[140],"like":[144],"VGG-8":[145],"CIFAR-10":[147],"dataset":[148,157],"and":[149,153,170],"AlexNet,":[150],"GoogLeNet,":[151],"ResNet-18":[152],"DenseNet-121":[154],"ImageNet":[156],"measure":[159],"tradeoffs":[161],"between":[162],"reconfigurability,":[164],"area,":[166],"memory":[167],"utilization,":[168],"throughput":[169],"energy":[171],"efficiency.":[172]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
