{"id":"https://openalex.org/W3184791505","doi":"https://doi.org/10.23919/date51398.2021.9473946","title":"Critical Path Isolation and Bit-Width Scaling Are Highly Compatible for Voltage Over-Scalable Design","display_name":"Critical Path Isolation and Bit-Width Scaling Are Highly Compatible for Voltage Over-Scalable Design","publication_year":2021,"publication_date":"2021-02-01","ids":{"openalex":"https://openalex.org/W3184791505","doi":"https://doi.org/10.23919/date51398.2021.9473946","mag":"3184791505"},"language":"en","primary_location":{"id":"doi:10.23919/date51398.2021.9473946","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date51398.2021.9473946","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://nagoya.repo.nii.ac.jp/records/2002735","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062214303","display_name":"Yutaka Masuda","orcid":"https://orcid.org/0000-0001-5177-5322"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yutaka Masuda","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027130179","display_name":"Jun Nagayama","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jun Nagayama","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101089698","display_name":"TaiYu Cheng","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"TaiYu Cheng","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022726556","display_name":"Tohru Ishihara","orcid":"https://orcid.org/0000-0002-1650-9958"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tohru Ishihara","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017250887","display_name":"Yoichi Momiyama","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yoichi Momiyama","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5002405139","display_name":"Masanori Hashimoto","orcid":"https://orcid.org/0000-0002-0377-2108"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Masanori Hashimoto","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1260","last_page":"1265"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6444814205169678},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5634269714355469},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.518610954284668},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5126222968101501},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.5110529661178589},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.507192850112915},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5030857920646667},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.4463460147380829},{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.4345337152481079},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.4327007532119751},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.42202097177505493},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.41800329089164734},{"id":"https://openalex.org/keywords/power-optimization","display_name":"Power optimization","score":0.4148046374320984},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.24353492259979248},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.22370082139968872},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21801069378852844},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18747282028198242},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.148718923330307}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6444814205169678},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5634269714355469},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.518610954284668},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5126222968101501},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.5110529661178589},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.507192850112915},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5030857920646667},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.4463460147380829},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.4345337152481079},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.4327007532119751},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.42202097177505493},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.41800329089164734},{"id":"https://openalex.org/C168292644","wikidata":"https://www.wikidata.org/wiki/Q10860336","display_name":"Power optimization","level":4,"score":0.4148046374320984},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.24353492259979248},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.22370082139968872},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21801069378852844},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18747282028198242},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.148718923330307},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.23919/date51398.2021.9473946","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date51398.2021.9473946","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"},{"id":"pmh:oai:irdb.nii.ac.jp:01152:0005337891","is_oa":true,"landing_page_url":"https://nagoya.repo.nii.ac.jp/records/2002735","pdf_url":null,"source":{"id":"https://openalex.org/S7407056385","display_name":"Institutional Repositories DataBase (IRDB)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I184597095","host_organization_name":"National Institute of Informatics","host_organization_lineage":["https://openalex.org/I184597095"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":"2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"conference paper"}],"best_oa_location":{"id":"pmh:oai:irdb.nii.ac.jp:01152:0005337891","is_oa":true,"landing_page_url":"https://nagoya.repo.nii.ac.jp/records/2002735","pdf_url":null,"source":{"id":"https://openalex.org/S7407056385","display_name":"Institutional Repositories DataBase (IRDB)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I184597095","host_organization_name":"National Institute of Informatics","host_organization_lineage":["https://openalex.org/I184597095"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":"2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"conference paper"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8100000023841858}],"awards":[{"id":"https://openalex.org/G6863421351","display_name":null,"funder_award_id":"JP19K24341,JP20K19767","funder_id":"https://openalex.org/F4320320212","funder_display_name":"Japan Society for the Promotion of Science London"}],"funders":[{"id":"https://openalex.org/F4320320212","display_name":"Japan Society for the Promotion of Science London","ror":"https://ror.org/02m7axw05"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W2015917466","https://openalex.org/W2020217519","https://openalex.org/W2026005150","https://openalex.org/W2082568343","https://openalex.org/W2104501591","https://openalex.org/W2104578404","https://openalex.org/W2115722171","https://openalex.org/W2128065014","https://openalex.org/W2133079932","https://openalex.org/W2136103183","https://openalex.org/W2244005500","https://openalex.org/W2539042097","https://openalex.org/W2590016403","https://openalex.org/W2612315906","https://openalex.org/W2979934956","https://openalex.org/W3141620748","https://openalex.org/W4242754029","https://openalex.org/W4245013765","https://openalex.org/W6671038894","https://openalex.org/W6677360253"],"related_works":["https://openalex.org/W2045408571","https://openalex.org/W2799803723","https://openalex.org/W2808428854","https://openalex.org/W2577477803","https://openalex.org/W2991342931","https://openalex.org/W1965232212","https://openalex.org/W2772390328","https://openalex.org/W2031753133","https://openalex.org/W1995592656","https://openalex.org/W2144148526"],"abstract_inverted_index":{"This":[0],"work":[1],"proposes":[2],"a":[3,218,241],"design":[4,21,82,143,226],"methodology":[5,22,71,104,192],"that":[6,202],"saves":[7,227],"the":[8,19,35,50,61,66,69,85,93,102,106,109,121,141,145,153,159,168,173,187,190,213,224,228],"power":[9,62,89,183,229],"under":[10,34,178],"voltage":[11,87,124,171],"over-scaling":[12],"(VOS)":[13],"operation.":[14],"The":[15],"key":[16,139],"idea":[17],"of":[18,37,52,108,125,155,172,215,221],"proposed":[20,70,103,142,191,225],"is":[23],"to":[24,73,186],"combine":[25],"critical":[26,54],"path":[27],"isolation":[28],"(CPI)":[29],"and":[30,77,88,114,128,165,175,204,209,237],"bit-width":[31,156],"scaling":[32],"(BWS)":[33],"constraint":[36],"computational":[38],"quality,":[39],"e.g.,":[40],"Peak":[41],"Signal-to-Noise":[42],"Ratio":[43],"(PSNR).":[44],"Conventional":[45],"CPI":[46,113,117,203],"inherently":[47],"cannot":[48],"reduce":[49,74],"delay":[51],"intrinsic":[53,76,132],"paths":[55,110],"(CPs),":[56],"which":[57],"may":[58],"significantly":[59,211],"restrict":[60],"saving":[63],"effect.":[64],"On":[65],"other":[67],"hand,":[68],"tries":[72],"both":[75],"non-intrinsic":[78,126,163],"CPs.":[79],"Therefore,":[80],"our":[81],"dramatically":[83],"reduces":[84],"supply":[86,123,170],"dissipation":[90,230],"while":[91],"satisfying":[92],"quality":[94,179],"constraint.":[95],"Moreover,":[96],"for":[97,162,181,233,240],"reducing":[98,120,182],"co-design":[99],"exploration":[100],"space,":[101],"utilizes":[105],"exclusiveness":[107],"targeted":[111],"by":[112,231,238],"BWS,":[115],"where":[116],"aims":[118],"at":[119],"minimum":[122,169],"CP,":[127],"BWS":[129,174,205],"focuses":[130],"on":[131],"CPs":[133],"in":[134],"arithmetic":[135],"units.":[136],"From":[137],"this":[138],"exclusiveness,":[140],"splits":[144],"simultaneous":[146],"optimization":[147,161],"problem":[148,188],"into":[149],"three":[150],"sub-problems;":[151],"(1)":[152],"determination":[154],"reduction,":[157],"(2)":[158],"timing":[160],"CPs,":[164],"(3)":[166],"investigating":[167],"CPI-applied":[176],"circuit":[177],"constraint,":[180],"dissipation.":[184],"Thanks":[185],"splitting,":[189],"can":[193],"efficiently":[194],"find":[195],"quality-constrained":[196],"minimum-power":[197],"design.":[198],"Evaluation":[199],"results":[200],"show":[201],"are":[206],"highly":[207],"compatible,":[208],"they":[210],"enhance":[212],"efficacy":[214],"VOS.":[216],"In":[217],"case":[219],"study":[220],"GPGPU":[222],"processor,":[223],"42.7%":[232],"an":[234],"image":[235],"processing":[236],"51.2%":[239],"neural":[242],"network":[243],"inference":[244],"workload.":[245]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}