{"id":"https://openalex.org/W3185178828","doi":"https://doi.org/10.23919/date51398.2021.9473936","title":"An Efficient Yield Estimation Method for Layouts of High Dimensional and High Sigma SRAM Arrays","display_name":"An Efficient Yield Estimation Method for Layouts of High Dimensional and High Sigma SRAM Arrays","publication_year":2021,"publication_date":"2021-02-01","ids":{"openalex":"https://openalex.org/W3185178828","doi":"https://doi.org/10.23919/date51398.2021.9473936","mag":"3185178828"},"language":"en","primary_location":{"id":"doi:10.23919/date51398.2021.9473936","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date51398.2021.9473936","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090011683","display_name":"Yue Shen","orcid":"https://orcid.org/0000-0002-2985-825X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yue Shen","raw_affiliation_strings":["State Key Lab of ASIC & System, School of Microelectronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Lab of ASIC & System, School of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037328458","display_name":"Changhao Yan","orcid":"https://orcid.org/0000-0002-8936-3945"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Changhao Yan","raw_affiliation_strings":["State Key Lab of ASIC & System, School of Microelectronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Lab of ASIC & System, School of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114310084","display_name":"Sheng-Guo Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I102149020","display_name":"University of North Carolina at Charlotte","ror":"https://ror.org/04dawnj30","country_code":"US","type":"education","lineage":["https://openalex.org/I102149020"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sheng-Guo Wang","raw_affiliation_strings":["Dept. of CS, University of North Carolina at Charlotte, Charlotte, USA"],"affiliations":[{"raw_affiliation_string":"Dept. of CS, University of North Carolina at Charlotte, Charlotte, USA","institution_ids":["https://openalex.org/I102149020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054960059","display_name":"Dian Zhou","orcid":"https://orcid.org/0000-0002-2648-5232"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dian Zhou","raw_affiliation_strings":["Dept. of EE, University of Texas at Dallas, Dallas, USA"],"affiliations":[{"raw_affiliation_string":"Dept. of EE, University of Texas at Dallas, Dallas, USA","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064213921","display_name":"Xuan Zeng","orcid":"https://orcid.org/0000-0002-8097-4053"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xuan Zeng","raw_affiliation_strings":["State Key Lab of ASIC & System, School of Microelectronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Lab of ASIC & System, School of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5090011683"],"corresponding_institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210132426"],"apc_list":null,"apc_paid":null,"fwci":0.1003,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.42079399,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1723","last_page":"1728"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.9093379974365234},{"id":"https://openalex.org/keywords/high-fidelity","display_name":"High fidelity","score":0.7445536851882935},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6868151426315308},{"id":"https://openalex.org/keywords/convergence","display_name":"Convergence (economics)","score":0.6367323994636536},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6238042116165161},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5444227457046509},{"id":"https://openalex.org/keywords/gaussian","display_name":"Gaussian","score":0.4841900169849396},{"id":"https://openalex.org/keywords/yield","display_name":"Yield (engineering)","score":0.4679853916168213},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.44721296429634094},{"id":"https://openalex.org/keywords/kriging","display_name":"Kriging","score":0.44098031520843506},{"id":"https://openalex.org/keywords/gaussian-process","display_name":"Gaussian process","score":0.43287843465805054},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.400871217250824},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3771631121635437},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3402920365333557},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2020946443080902},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1655747890472412},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.08757540583610535},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.07102316617965698}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.9093379974365234},{"id":"https://openalex.org/C113364801","wikidata":"https://www.wikidata.org/wiki/Q26674","display_name":"High fidelity","level":2,"score":0.7445536851882935},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6868151426315308},{"id":"https://openalex.org/C2777303404","wikidata":"https://www.wikidata.org/wiki/Q759757","display_name":"Convergence (economics)","level":2,"score":0.6367323994636536},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6238042116165161},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5444227457046509},{"id":"https://openalex.org/C163716315","wikidata":"https://www.wikidata.org/wiki/Q901177","display_name":"Gaussian","level":2,"score":0.4841900169849396},{"id":"https://openalex.org/C134121241","wikidata":"https://www.wikidata.org/wiki/Q899301","display_name":"Yield (engineering)","level":2,"score":0.4679853916168213},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.44721296429634094},{"id":"https://openalex.org/C81692654","wikidata":"https://www.wikidata.org/wiki/Q225926","display_name":"Kriging","level":2,"score":0.44098031520843506},{"id":"https://openalex.org/C61326573","wikidata":"https://www.wikidata.org/wiki/Q1496376","display_name":"Gaussian process","level":3,"score":0.43287843465805054},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.400871217250824},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3771631121635437},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3402920365333557},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2020946443080902},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1655747890472412},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.08757540583610535},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.07102316617965698},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/date51398.2021.9473936","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date51398.2021.9473936","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G7035199170","display_name":null,"funder_award_id":"61974032,61774045,61929102,61674042","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1502922572","https://openalex.org/W1972777769","https://openalex.org/W1977046327","https://openalex.org/W2021726697","https://openalex.org/W2033246483","https://openalex.org/W2035652262","https://openalex.org/W2082290707","https://openalex.org/W2092478972","https://openalex.org/W2102559904","https://openalex.org/W2113145584","https://openalex.org/W2119312496","https://openalex.org/W2519965010","https://openalex.org/W2547566193","https://openalex.org/W2586938721","https://openalex.org/W2625601251","https://openalex.org/W2809427419","https://openalex.org/W3139804307","https://openalex.org/W4243669666","https://openalex.org/W4247460323","https://openalex.org/W4250224272","https://openalex.org/W6676544178","https://openalex.org/W6752474760"],"related_works":["https://openalex.org/W566010457","https://openalex.org/W2600092203","https://openalex.org/W4300066510","https://openalex.org/W2056958800","https://openalex.org/W2803685231","https://openalex.org/W4293503520","https://openalex.org/W3134152097","https://openalex.org/W4311388919","https://openalex.org/W2966696655","https://openalex.org/W3185178828"],"abstract_inverted_index":{"This":[0],"paper":[1],"firstly":[2],"focuses":[3],"on":[4,8],"yield":[5],"estimation":[6],"problem":[7],"post-layout-simulation":[9],"of":[10,65],"high":[11],"dimensional":[12],"SRAM":[13,28,41,68],"arrays.":[14],"Post-layout-simulation":[15],"is":[16,48,53,58],"much":[17],"more":[18,62],"credible":[19],"than":[20,89],"pre-simulation.":[21],"However,":[22],"it":[23],"introduces":[24],"strong":[25],"relationship":[26],"among":[27],"columns.":[29],"The":[30],"Multi-Fidelity":[31],"Gaussian":[32],"Process":[33],"model":[34],"between":[35],"the":[36,39,66,78,90],"small":[37,67],"and":[38,55,70],"large":[40],"arrays":[42,69],"near":[43],"Optimal":[44],"Shift":[45],"Vector":[46],"(OSV)":[47],"built.":[49],"An":[50],"iterative":[51],"strategy":[52],"proposed":[54,79],"Multi-Modal":[56],"method":[57,80,92],"applied":[59],"to":[60],"obtain":[61],"prior":[63],"knowledge":[64],"further":[71],"accelerate":[72],"convergence.":[73],"Experimental":[74],"results":[75],"show":[76],"that":[77],"can":[81],"gain":[82],"5-7x":[83],"speedup":[84],"with":[85],"less":[86],"relative":[87],"errors":[88],"state-of-the-art":[91],"for":[93],"384D":[94],"cases.":[95]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
