{"id":"https://openalex.org/W3035877890","doi":"https://doi.org/10.23919/date48585.2020.9116478","title":"A RRAM-based FPGA for Energy-efficient Edge Computing","display_name":"A RRAM-based FPGA for Energy-efficient Edge Computing","publication_year":2020,"publication_date":"2020-03-01","ids":{"openalex":"https://openalex.org/W3035877890","doi":"https://doi.org/10.23919/date48585.2020.9116478","mag":"3035877890"},"language":"en","primary_location":{"id":"doi:10.23919/date48585.2020.9116478","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date48585.2020.9116478","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103004961","display_name":"Xifan Tang","orcid":"https://orcid.org/0000-0003-2203-3981"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Xifan Tang","raw_affiliation_strings":["Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah, U.S.A"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah, U.S.A","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055536889","display_name":"Edouard Giacomin","orcid":"https://orcid.org/0000-0002-5415-1870"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Edouard Giacomin","raw_affiliation_strings":["Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah, U.S.A"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah, U.S.A","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054205742","display_name":"Patsy Cadareanu","orcid":"https://orcid.org/0000-0002-9486-5683"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Patsy Cadareanu","raw_affiliation_strings":["Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah, U.S.A"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah, U.S.A","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006420890","display_name":"Ganesh Gore","orcid":"https://orcid.org/0000-0002-0310-197X"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ganesh Gore","raw_affiliation_strings":["Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah, U.S.A"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah, U.S.A","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002568331","display_name":"Pierre\u2010Emmanuel Gaillardon","orcid":"https://orcid.org/0000-0003-3634-3999"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pierre-Emmanuel Gaillardon","raw_affiliation_strings":["Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah, U.S.A"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah, U.S.A","institution_ids":["https://openalex.org/I223532165"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5103004961"],"corresponding_institution_ids":["https://openalex.org/I223532165"],"apc_list":null,"apc_paid":null,"fwci":1.0275,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.76088685,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"144","last_page":"a"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.8411823511123657},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8331148028373718},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6558043956756592},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6305251717567444},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5260303616523743},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4940822422504425},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.48058104515075684},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.4645492732524872},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.4110790193080902},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.373080313205719},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3231201469898224},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.21825826168060303},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21518784761428833},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18705838918685913},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09110358357429504}],"concepts":[{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.8411823511123657},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8331148028373718},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6558043956756592},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6305251717567444},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5260303616523743},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4940822422504425},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.48058104515075684},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.4645492732524872},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.4110790193080902},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.373080313205719},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3231201469898224},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.21825826168060303},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21518784761428833},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18705838918685913},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09110358357429504},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/date48585.2020.9116478","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date48585.2020.9116478","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W564382181","https://openalex.org/W1480183640","https://openalex.org/W1523051745","https://openalex.org/W1989227777","https://openalex.org/W2001824086","https://openalex.org/W2004823737","https://openalex.org/W2005602803","https://openalex.org/W2006798699","https://openalex.org/W2045617353","https://openalex.org/W2051736202","https://openalex.org/W2077066011","https://openalex.org/W2078177817","https://openalex.org/W2086709250","https://openalex.org/W2095258817","https://openalex.org/W2118995854","https://openalex.org/W2120452158","https://openalex.org/W2120544688","https://openalex.org/W2263042501","https://openalex.org/W2566594221","https://openalex.org/W2589417202","https://openalex.org/W2751904527","https://openalex.org/W2789785996","https://openalex.org/W2901679026","https://openalex.org/W2904347961","https://openalex.org/W2988212920","https://openalex.org/W4214686615","https://openalex.org/W6663196874","https://openalex.org/W6681989696"],"related_works":["https://openalex.org/W2004526657","https://openalex.org/W2808603160","https://openalex.org/W2041608016","https://openalex.org/W3022490167","https://openalex.org/W2102690581","https://openalex.org/W3122096049","https://openalex.org/W2386482964","https://openalex.org/W2896851707","https://openalex.org/W2371841116","https://openalex.org/W4386159386"],"abstract_inverted_index":{"The":[0],"shift":[1],"from":[2,98],"centralized":[3],"cloud":[4],"to":[5,124,129,163],"edge":[6,43],"computing":[7,44],"demands":[8],"hardware":[9,33],"systems":[10],"with":[11],"data":[12],"processing":[13],"capability":[14],"at":[15,132,138],"ultra-low":[16],"power.":[17],"Reconfigurable":[18],"solutions":[19],"such":[20],"as":[21,57,186,188],"Field-Programmable":[22],"Gate":[23],"Arrays":[24],"(FPGAs)":[25],"offer":[26],"a":[27,55,69,83,88,139,190],"high":[28],"flexibility":[29],"in":[30,41,126],"terms":[31],"of":[32,52],"implementation":[34],"and":[35,103,113],"are":[36],"thus":[37],"popular":[38],"for":[39],"use":[40],"many":[42],"systems.":[45],"However,":[46],"breaking":[47],"through":[48],"the":[49,145,151,174],"energy":[50],"wall":[51],"FPGAs":[53,120],"is":[54],"challenge,":[56],"low-power":[58,70],"operation":[59],"often":[60],"requires":[61],"compromising":[62],"performances.":[63],"In":[64,167],"this":[65],"paper,":[66],"we":[67,86,116],"study":[68],"high-performance":[71],"FPGA":[72,96,148,177],"architecture":[73,178],"exploiting":[74],"Resistive":[75],"Random":[76],"Access":[77],"Memory":[78],"(RRAM)":[79],"technology.":[80],"To":[81],"perform":[82],"comprehensive":[84],"analysis,":[85],"introduce":[87],"novel":[89],"design":[90],"flow":[91],"which":[92,99],"can":[93,106,121,149],"rapidly":[94],"prototype":[95],"fabrics":[97],"accurate":[100],"area,":[101],"delay,":[102],"power":[104],"results":[105],"be":[107],"obtained.":[108],"Based":[109],"on":[110],"full-chip":[111],"layouts":[112],"SPICE":[114],"simulations,":[115],"show":[117],"that":[118,173],"RRAM-based":[119,147,176],"improve":[122,150],"up":[123],"8%/22%/16%":[125],"area/delay/power":[127],"compared":[128,162],"SRAM-based":[130,165],"counterparts":[131],"nominal":[133],"voltage.":[134],"Even":[135],"when":[136,161],"operated":[137],"near-V":[140],"<sub":[141],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[142],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">t</sub>":[143],"supply,":[144],"proposed":[146,175],"Energy-Delay":[152],"Product":[153],"by":[154],"about":[155],"2\u00d7":[156],"without":[157],"any":[158],"delay":[159],"overhead,":[160],"an":[164],"FPGA.":[166],"addition,":[168],"Monte":[169],"Carlo":[170],"simulations":[171],"showed":[172],"stays":[179],"robust":[180],"under":[181,189],"different":[182],"CMOS":[183],"process":[184],"corners":[185],"well":[187],"30%":[191],"RRAM":[192],"resistance":[193],"standard":[194],"deviation.":[195]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2}],"updated_date":"2026-02-24T19:35:01.260952","created_date":"2025-10-10T00:00:00"}