{"id":"https://openalex.org/W3035875322","doi":"https://doi.org/10.23919/date48585.2020.9116473","title":"Prospector: Synthesizing Efficient Accelerators via Statistical Learning","display_name":"Prospector: Synthesizing Efficient Accelerators via Statistical Learning","publication_year":2020,"publication_date":"2020-03-01","ids":{"openalex":"https://openalex.org/W3035875322","doi":"https://doi.org/10.23919/date48585.2020.9116473","mag":"3035875322"},"language":"en","primary_location":{"id":"doi:10.23919/date48585.2020.9116473","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date48585.2020.9116473","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004696082","display_name":"Atefeh Mehrabi","orcid":null},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Atefeh Mehrabi","raw_affiliation_strings":["Duke University,Department of Electrical and Computer Engineering,Durham,NC,USA","Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"],"affiliations":[{"raw_affiliation_string":"Duke University,Department of Electrical and Computer Engineering,Durham,NC,USA","institution_ids":["https://openalex.org/I170897317"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031504314","display_name":"Aninda Manocha","orcid":"https://orcid.org/0000-0002-0764-0778"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Aninda Manocha","raw_affiliation_strings":["Princeton University,Department of Computer Science,Princeton,NJ,USA","Department of Computer Science, Princeton University, Princeton, NJ, USA"],"affiliations":[{"raw_affiliation_string":"Princeton University,Department of Computer Science,Princeton,NJ,USA","institution_ids":["https://openalex.org/I20089843"]},{"raw_affiliation_string":"Department of Computer Science, Princeton University, Princeton, NJ, USA","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003811456","display_name":"Benjamin C. Lee","orcid":"https://orcid.org/0000-0003-4472-6375"},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Benjamin C. Lee","raw_affiliation_strings":["Duke University,Department of Electrical and Computer Engineering,Durham,NC,USA","Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"],"affiliations":[{"raw_affiliation_string":"Duke University,Department of Electrical and Computer Engineering,Durham,NC,USA","institution_ids":["https://openalex.org/I170897317"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072847774","display_name":"Daniel J. Sorin","orcid":"https://orcid.org/0000-0001-7013-8986"},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Daniel J. Sorin","raw_affiliation_strings":["Duke University,Department of Electrical and Computer Engineering,Durham,NC,USA","Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"],"affiliations":[{"raw_affiliation_string":"Duke University,Department of Electrical and Computer Engineering,Durham,NC,USA","institution_ids":["https://openalex.org/I170897317"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5004696082"],"corresponding_institution_ids":["https://openalex.org/I170897317"],"apc_list":null,"apc_paid":null,"fwci":1.3357,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.80513408,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"151","last_page":"156"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10848","display_name":"Advanced Multi-Objective Optimization Algorithms","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.761239767074585},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5649937987327576},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.48313018679618835},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.46807751059532166},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4548906981945038},{"id":"https://openalex.org/keywords/field","display_name":"Field (mathematics)","score":0.44168782234191895},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4220846891403198},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41990160942077637},{"id":"https://openalex.org/keywords/pareto-principle","display_name":"Pareto principle","score":0.41053032875061035},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12940412759780884}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.761239767074585},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5649937987327576},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.48313018679618835},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.46807751059532166},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4548906981945038},{"id":"https://openalex.org/C9652623","wikidata":"https://www.wikidata.org/wiki/Q190109","display_name":"Field (mathematics)","level":2,"score":0.44168782234191895},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4220846891403198},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41990160942077637},{"id":"https://openalex.org/C137635306","wikidata":"https://www.wikidata.org/wiki/Q182667","display_name":"Pareto principle","level":2,"score":0.41053032875061035},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12940412759780884},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/date48585.2020.9116473","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date48585.2020.9116473","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/8","display_name":"Decent work and economic growth","score":0.44999998807907104}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1490783972","https://openalex.org/W2012114780","https://openalex.org/W2024540609","https://openalex.org/W2097998348","https://openalex.org/W2112912151","https://openalex.org/W2113234488","https://openalex.org/W2125763038","https://openalex.org/W2126105956","https://openalex.org/W2138209363","https://openalex.org/W2147770312","https://openalex.org/W2154009134","https://openalex.org/W2154327203","https://openalex.org/W2162385899","https://openalex.org/W2192203593","https://openalex.org/W2221104225","https://openalex.org/W2398354748","https://openalex.org/W2515406844","https://openalex.org/W2525927134","https://openalex.org/W2742479298","https://openalex.org/W2774970068","https://openalex.org/W4229673714","https://openalex.org/W4246745253","https://openalex.org/W4298342842","https://openalex.org/W6629372152","https://openalex.org/W6674385629"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2355315220","https://openalex.org/W4200391368","https://openalex.org/W2612099726","https://openalex.org/W2160632767","https://openalex.org/W1924077319","https://openalex.org/W2619340758","https://openalex.org/W4313484792","https://openalex.org/W2121053958","https://openalex.org/W4282568311"],"abstract_inverted_index":{"Accelerator":[0],"design":[1,46],"is":[2],"expensive":[3],"due":[4],"to":[5,9,22,62,90,94],"the":[6,15],"effort":[7,47],"required":[8],"understand":[10],"an":[11,53],"algorithm":[12],"and":[13,69],"optimize":[14,63],"design.":[16],"Architects":[17],"have":[18],"embraced":[19],"two":[20],"technologies":[21],"reduce":[23,45],"costs.":[24],"High-level":[25],"synthesis":[26,64],"automatically":[27],"generates":[28],"hardware":[29],"from":[30],"code.":[31],"Reconfigurable":[32],"fabrics":[33],"instantiate":[34],"accelerators":[35],"while":[36],"avoiding":[37],"fabrication":[38],"costs":[39],"for":[40],"custom":[41],"circuits.":[42],"We":[43,51,76],"further":[44],"with":[48],"statistical":[49],"learning.":[50],"build":[52],"automated":[54],"framework,":[55],"called":[56],"Prospector,":[57],"that":[58],"uses":[59],"Bayesian":[60],"techniques":[61],"directives,":[65],"reducing":[66],"execution":[67],"latency":[68],"resource":[70],"usage":[71],"in":[72,78],"field-programmable":[73],"gate":[74],"arrays.":[75],"show":[77],"a":[79],"certain":[80],"amount":[81],"of":[82],"time":[83],"designs":[84,92],"discovered":[85],"by":[86],"Prospector":[87],"are":[88],"closer":[89],"Pareto-efficient":[91],"compared":[93],"prior":[95],"approaches.":[96]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":6}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}