{"id":"https://openalex.org/W3036450648","doi":"https://doi.org/10.23919/date48585.2020.9116226","title":"An On-Chip Learning Accelerator for Spiking Neural Networks using STT-RAM Crossbar Arrays","display_name":"An On-Chip Learning Accelerator for Spiking Neural Networks using STT-RAM Crossbar Arrays","publication_year":2020,"publication_date":"2020-03-01","ids":{"openalex":"https://openalex.org/W3036450648","doi":"https://doi.org/10.23919/date48585.2020.9116226","mag":"3036450648"},"language":"en","primary_location":{"id":"doi:10.23919/date48585.2020.9116226","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date48585.2020.9116226","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023663011","display_name":"Shruti Kulkarni","orcid":"https://orcid.org/0000-0001-6894-9851"},"institutions":[{"id":"https://openalex.org/I118118575","display_name":"New Jersey Institute of Technology","ror":"https://ror.org/05e74xb87","country_code":"US","type":"education","lineage":["https://openalex.org/I118118575"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shruti R. Kulkarni","raw_affiliation_strings":["New Jersey Institute of Technology,Department of Electrical and Computer Engineering,Newark,NJ,USA,07102"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"New Jersey Institute of Technology,Department of Electrical and Computer Engineering,Newark,NJ,USA,07102","institution_ids":["https://openalex.org/I118118575"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074272474","display_name":"Shihui Yin","orcid":"https://orcid.org/0000-0001-7186-0946"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shihui Yin","raw_affiliation_strings":["Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ,USA,85287"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ,USA,85287","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007690955","display_name":"Jae-sun Seo","orcid":"https://orcid.org/0000-0002-4551-7789"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jae-sun Seo","raw_affiliation_strings":["Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ,USA,85287"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ,USA,85287","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048595299","display_name":"Bipin Rajendran","orcid":"https://orcid.org/0000-0002-2960-6909"},"institutions":[{"id":"https://openalex.org/I183935753","display_name":"King's College London","ror":"https://ror.org/0220mzb33","country_code":"GB","type":"education","lineage":["https://openalex.org/I124357947","https://openalex.org/I183935753"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Bipin Rajendran","raw_affiliation_strings":["King’s College London, Strand,Department of Engineering,London,UK,WC2R 2LS"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"King’s College London, Strand,Department of Engineering,London,UK,WC2R 2LS","institution_ids":["https://openalex.org/I183935753"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.4313,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.7816224,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1019","last_page":"1024"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12611","display_name":"Neural Networks and Reservoir Computing","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.8010159730911255},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7520845532417297},{"id":"https://openalex.org/keywords/spiking-neural-network","display_name":"Spiking neural network","score":0.7154173851013184},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5888872742652893},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5370563268661499},{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.48320305347442627},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.44717171788215637},{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.4376524090766907},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.42799803614616394},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.42191022634506226},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.3716547191143036},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32694578170776367},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3241115212440491},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.18013045191764832},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.16832560300827026},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1292746663093567},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.12362462282180786},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.08753859996795654}],"concepts":[{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.8010159730911255},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7520845532417297},{"id":"https://openalex.org/C11731999","wikidata":"https://www.wikidata.org/wiki/Q9067355","display_name":"Spiking neural network","level":3,"score":0.7154173851013184},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5888872742652893},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5370563268661499},{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.48320305347442627},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.44717171788215637},{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.4376524090766907},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.42799803614616394},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.42191022634506226},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.3716547191143036},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32694578170776367},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3241115212440491},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.18013045191764832},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.16832560300827026},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1292746663093567},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.12362462282180786},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.08753859996795654},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.23919/date48585.2020.9116226","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date48585.2020.9116226","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"},{"id":"pmh:oai:kclpure.kcl.ac.uk:publications/c97a8408-a7d2-4961-ac07-a8fdf62fda1f","is_oa":false,"landing_page_url":"http://www.scopus.com/inward/record.url?scp=85087411502&partnerID=8YFLogxK","pdf_url":null,"source":{"id":"https://openalex.org/S4306400216","display_name":"Research Portal (King's College London)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I183935753","host_organization_name":"King's College London","host_organization_lineage":["https://openalex.org/I183935753"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":57,"referenced_works":["https://openalex.org/W1999085092","https://openalex.org/W2055371516","https://openalex.org/W2075960179","https://openalex.org/W2085273892","https://openalex.org/W2087461437","https://openalex.org/W2138913040","https://openalex.org/W2156728623","https://openalex.org/W2193413348","https://openalex.org/W2242818861","https://openalex.org/W2267635276","https://openalex.org/W2286365479","https://openalex.org/W2290824897","https://openalex.org/W2300242332","https://openalex.org/W2307193480","https://openalex.org/W2318186648","https://openalex.org/W2345010043","https://openalex.org/W2513853720","https://openalex.org/W2566022994","https://openalex.org/W2594836184","https://openalex.org/W2612445135","https://openalex.org/W2675031852","https://openalex.org/W2751084147","https://openalex.org/W2754071796","https://openalex.org/W2769049661","https://openalex.org/W2783525259","https://openalex.org/W2794141774","https://openalex.org/W2796472956","https://openalex.org/W2801986726","https://openalex.org/W2806738056","https://openalex.org/W2889797931","https://openalex.org/W2903086273","https://openalex.org/W2946955515","https://openalex.org/W2951247785","https://openalex.org/W2953235111","https://openalex.org/W2963817554","https://openalex.org/W2964350391","https://openalex.org/W2966081953","https://openalex.org/W3000884231","https://openalex.org/W3024621361","https://openalex.org/W3026883080","https://openalex.org/W3102630195","https://openalex.org/W3142548120","https://openalex.org/W4249654426","https://openalex.org/W4295262505","https://openalex.org/W4297775537","https://openalex.org/W6687566353","https://openalex.org/W6690026940","https://openalex.org/W6693397755","https://openalex.org/W6694260854","https://openalex.org/W6696004547","https://openalex.org/W6698200048","https://openalex.org/W6731398821","https://openalex.org/W6737664043","https://openalex.org/W6750132547","https://openalex.org/W6753770798","https://openalex.org/W6762484958","https://openalex.org/W6777931879"],"related_works":["https://openalex.org/W4308098692","https://openalex.org/W4308575307","https://openalex.org/W4385411400","https://openalex.org/W3217323523","https://openalex.org/W4315464822","https://openalex.org/W1968537616","https://openalex.org/W3092023946","https://openalex.org/W4376624478","https://openalex.org/W3000884231","https://openalex.org/W3036450648"],"abstract_inverted_index":{"In":[0],"this":[1],"work,":[2],"we":[3],"present":[4],"a":[5,11,91,151],"scheme":[6],"for":[7,19,78,114,125,155],"implementing":[8],"learning":[9,153],"on":[10],"digital":[12,112],"non-volatile":[13,30],"memory":[14,62,102],"(NVM)":[15],"based":[16,131,147],"hardware":[17],"accelerator":[18],"Spiking":[20],"Neural":[21],"Networks":[22],"(SNNs).":[23],"Our":[24,95,129],"design":[25,67,132],"estimates":[26],"across":[27],"three":[28],"prominent":[29],"memories":[31],"-":[32],"Phase":[33],"Change":[34],"Memory":[35],"(PCM),":[36],"Resistive":[37],"RAM":[38,44],"(RRAM),":[39],"and":[40,68,80,105,110,123,161],"Spin":[41],"Transfer":[42],"Torque":[43],"(STT-RAM)":[45],"show":[46],"that":[47],"the":[48,59,66,69,74,88,101,111,115],"STT-RAM":[49,75,85,130],"arrays":[50],"enable":[51],"at":[52],"least":[53],"2\u00d7":[54],"higher":[55,135],"throughput":[56],"compared":[57,143],"to":[58,144],"other":[60],"two":[61],"technologies.":[63],"We":[64],"discuss":[65],"signal":[70],"communication":[71],"framework":[72],"through":[73],"crossbar":[76,103],"array":[77,89,104],"training":[79],"inference":[81],"in":[82,87],"SNNs.":[83],"Each":[84],"cell":[86],"stores":[90],"single":[92],"bit":[93],"value.":[94],"neurosynaptic":[96],"computational":[97],"core":[98],"consists":[99],"of":[100],"its":[106],"read/write":[107],"peripheral":[108],"circuitry":[109],"logic":[113],"spiking":[116],"neurons,":[117],"weight":[118],"update":[119],"computations,":[120],"spike":[121,127],"router,":[122],"decoder":[124],"incoming":[126],"packets.":[128],"shows":[133],"~20\u00d7":[134],"performance":[136],"per":[137,140],"unit":[138,141],"Watt":[139],"area":[142,160],"conventional":[145],"SRAM":[146],"design,":[148],"making":[149],"it":[150],"promising":[152],"platform":[154],"realizing":[156],"systems":[157],"with":[158],"significant":[159],"power":[162],"limitations.":[163]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":3},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}