{"id":"https://openalex.org/W2945593694","doi":"https://doi.org/10.23919/date.2019.8715184","title":"Behavioral Modeling of Transistor-Level Circuits using Automatic Abstraction to Hybrid Automata","display_name":"Behavioral Modeling of Transistor-Level Circuits using Automatic Abstraction to Hybrid Automata","publication_year":2019,"publication_date":"2019-03-01","ids":{"openalex":"https://openalex.org/W2945593694","doi":"https://doi.org/10.23919/date.2019.8715184","mag":"2945593694"},"language":"en","primary_location":{"id":"doi:10.23919/date.2019.8715184","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date.2019.8715184","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024739565","display_name":"Ahmad Tarraf","orcid":"https://orcid.org/0000-0002-9174-5598"},"institutions":[{"id":"https://openalex.org/I114090438","display_name":"Goethe University Frankfurt","ror":"https://ror.org/04cvxnb49","country_code":"DE","type":"education","lineage":["https://openalex.org/I114090438"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ahmad Tarraf","raw_affiliation_strings":["Institute for Computer Science, Goethe University, Frankfurt, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Computer Science, Goethe University, Frankfurt, Germany","institution_ids":["https://openalex.org/I114090438"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038049766","display_name":"Lars Hedrich","orcid":null},"institutions":[{"id":"https://openalex.org/I114090438","display_name":"Goethe University Frankfurt","ror":"https://ror.org/04cvxnb49","country_code":"DE","type":"education","lineage":["https://openalex.org/I114090438"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Lars Hedrich","raw_affiliation_strings":["Institute for Computer Science, Goethe University, Frankfurt, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Computer Science, Goethe University, Frankfurt, Germany","institution_ids":["https://openalex.org/I114090438"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6055,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.68544873,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1451","last_page":"1456"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.8456518650054932},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7169142961502075},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5842651128768921},{"id":"https://openalex.org/keywords/automaton","display_name":"Automaton","score":0.567237913608551},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5039271712303162},{"id":"https://openalex.org/keywords/behavioral-modeling","display_name":"Behavioral modeling","score":0.4187554121017456},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3511858880519867},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1718226671218872},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14584103226661682},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10934126377105713},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.0681338906288147}],"concepts":[{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.8456518650054932},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7169142961502075},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5842651128768921},{"id":"https://openalex.org/C112505250","wikidata":"https://www.wikidata.org/wiki/Q787116","display_name":"Automaton","level":2,"score":0.567237913608551},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5039271712303162},{"id":"https://openalex.org/C78639753","wikidata":"https://www.wikidata.org/wiki/Q3318160","display_name":"Behavioral modeling","level":2,"score":0.4187554121017456},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3511858880519867},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1718226671218872},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14584103226661682},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10934126377105713},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0681338906288147},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/date.2019.8715184","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date.2019.8715184","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1570202837","https://openalex.org/W1987748258","https://openalex.org/W2019019572","https://openalex.org/W2028924344","https://openalex.org/W2089828930","https://openalex.org/W2107818375","https://openalex.org/W2112020413","https://openalex.org/W2133973893","https://openalex.org/W2138751967","https://openalex.org/W2152220626","https://openalex.org/W2165159988","https://openalex.org/W2171786655","https://openalex.org/W2489811843","https://openalex.org/W4242900738","https://openalex.org/W4247433674","https://openalex.org/W4249744196","https://openalex.org/W6676408483","https://openalex.org/W6676529565","https://openalex.org/W6684858077"],"related_works":["https://openalex.org/W2045155990","https://openalex.org/W4313163053","https://openalex.org/W3045811229","https://openalex.org/W4300973204","https://openalex.org/W1483408780","https://openalex.org/W4284884309","https://openalex.org/W2908749798","https://openalex.org/W4243842598","https://openalex.org/W2105980483","https://openalex.org/W1514435881"],"abstract_inverted_index":{"Accurate":[0],"abstracted":[1],"behavioral":[2,52],"modeling":[3],"of":[4,28,77],"analog":[5],"circuits":[6,31,86],"is":[7,17,48,80],"still":[8],"an":[9,24],"open":[10],"problem,":[11],"especially":[12],"when":[13],"the":[14,66,78,104,107,111],"abstraction":[15,26],"process":[16],"automated.":[18],"In":[19],"this":[20],"paper":[21],"we":[22,101],"present":[23],"automated":[25],"technique":[27],"transistor":[29,84],"level":[30,85],"with":[32],"full":[33],"SPICE":[34],"accuracy":[35,74],"alongside":[36],"a":[37,44,51,94],"significant":[38],"simulation":[39],"speed-up.":[40],"The":[41,56,73],"methodology":[42,79],"computes":[43],"hybrid":[45,58],"automaton":[46,59],"which":[47],"transformed":[49],"into":[50],"model":[53,109],"in":[54],"Verilog-A.":[55],"resulting":[57],"exhibits":[60],"linear":[61],"behavior":[62],"as":[63,65],"well":[64],"technology":[67],"dependent":[68],"nonlinear":[69],"e.g.":[70],"limiting":[71],"behavior.":[72],"and":[75,110],"speed-up":[76],"evaluated":[81],"on":[82],"several":[83],"ranging":[87],"from":[88],"simple":[89],"operational":[90],"amplifiers":[91],"up":[92],"to":[93],"complex":[95],"industrial":[96],"OTA-based":[97],"Gm/C":[98],"filter.":[99],"Finally,":[100],"formally":[102],"verify":[103],"equivalence":[105],"between":[106],"generated":[108],"original":[112],"circuit.":[113]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}