{"id":"https://openalex.org/W2798746348","doi":"https://doi.org/10.23919/date.2018.8342170","title":"LASER: A hardware/software approach to accelerate complicated loops on CGRAs","display_name":"LASER: A hardware/software approach to accelerate complicated loops on CGRAs","publication_year":2018,"publication_date":"2018-03-01","ids":{"openalex":"https://openalex.org/W2798746348","doi":"https://doi.org/10.23919/date.2018.8342170","mag":"2798746348"},"language":"en","primary_location":{"id":"doi:10.23919/date.2018.8342170","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date.2018.8342170","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101849090","display_name":"Mahesh Balasubramanian","orcid":"https://orcid.org/0000-0001-5978-7221"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Mahesh Balasubramanian","raw_affiliation_strings":["Compiler Microarchitecture Lab, Arizona State University, Tempe, AZ"],"affiliations":[{"raw_affiliation_string":"Compiler Microarchitecture Lab, Arizona State University, Tempe, AZ","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080245918","display_name":"Shail Dave","orcid":"https://orcid.org/0000-0003-4262-3938"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shail Dave","raw_affiliation_strings":["Compiler Microarchitecture Lab, Arizona State University, Tempe, AZ"],"affiliations":[{"raw_affiliation_string":"Compiler Microarchitecture Lab, Arizona State University, Tempe, AZ","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044172378","display_name":"Aviral Shrivastava","orcid":"https://orcid.org/0000-0002-1075-897X"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Aviral Shrivastava","raw_affiliation_strings":["Compiler Microarchitecture Lab, Arizona State University, Tempe, AZ"],"affiliations":[{"raw_affiliation_string":"Compiler Microarchitecture Lab, Arizona State University, Tempe, AZ","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5015230101","display_name":"Reiley Jeyapaul","orcid":"https://orcid.org/0000-0002-3774-1916"},"institutions":[{"id":"https://openalex.org/I2801109035","display_name":"ARM (United Kingdom)","ror":"https://ror.org/04mmhzs81","country_code":"GB","type":"company","lineage":["https://openalex.org/I2801109035"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Reiley Jeyapaul","raw_affiliation_strings":["ARM, Cambridge, United Kingdom"],"affiliations":[{"raw_affiliation_string":"ARM, Cambridge, United Kingdom","institution_ids":["https://openalex.org/I2801109035"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5101849090"],"corresponding_institution_ids":["https://openalex.org/I55732556"],"apc_list":null,"apc_paid":null,"fwci":1.7673,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.83744806,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":98},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.833449125289917},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6380608081817627},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6026933789253235},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5620973706245422},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4311184287071228},{"id":"https://openalex.org/keywords/nested-loop-join","display_name":"Nested loop join","score":0.4298376441001892},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35030460357666016},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15954196453094482}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.833449125289917},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6380608081817627},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6026933789253235},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5620973706245422},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4311184287071228},{"id":"https://openalex.org/C1306188","wikidata":"https://www.wikidata.org/wiki/Q4060687","display_name":"Nested loop join","level":2,"score":0.4298376441001892},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35030460357666016},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15954196453094482}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/date.2018.8342170","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date.2018.8342170","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.9100000262260437}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W173935616","https://openalex.org/W1686420892","https://openalex.org/W1964191474","https://openalex.org/W1997981962","https://openalex.org/W2018348175","https://openalex.org/W2023027709","https://openalex.org/W2039223206","https://openalex.org/W2059626842","https://openalex.org/W2071792297","https://openalex.org/W2083150975","https://openalex.org/W2107834734","https://openalex.org/W2122171990","https://openalex.org/W2626186664","https://openalex.org/W4232751114","https://openalex.org/W4235539633","https://openalex.org/W4255231629","https://openalex.org/W6676336487"],"related_works":["https://openalex.org/W1483477496","https://openalex.org/W2140188477","https://openalex.org/W2734488036","https://openalex.org/W1575396273","https://openalex.org/W2008089270","https://openalex.org/W2134174838","https://openalex.org/W2296218291","https://openalex.org/W1982208645","https://openalex.org/W1572120101","https://openalex.org/W1591707960"],"abstract_inverted_index":{"Coarse-Grained":[0],"Reconfigurable":[1],"Arrays":[2],"(CGRAs)":[3],"are":[4,45,73],"popular":[5],"accelerators":[6],"predominantly":[7],"used":[8],"in":[9,41,116,119],"streaming,":[10],"filtering,":[11],"and":[12,20,52,55,71,112,129,147],"decoding":[13],"applications.":[14,100],"Due":[15],"to":[16,29,68,77,95,109],"their":[17],"high":[18,21],"performance":[19,143],"power-efficiency,":[22],"CGRAs":[23],"can":[24,127],"be":[25],"a":[26,86,92,120,141],"promising":[27],"solution":[28],"accelerate":[30,96],"the":[31,39,64,110,117,125,131,134],"loops":[32,40,49,56,81,98],"of":[33,99,145,149],"general":[34,42],"purpose":[35,43],"applications":[36,44],"also.":[37],"However,":[38],"often":[46],"complicated,":[47],"like":[48],"with":[50,57,151],"perfect":[51],"imperfect":[53],"nests":[54],"nested":[58],"if-then-else's":[59],"(conditionals).":[60],"We":[61],"argue":[62],"that":[63,124],"existing":[65],"hardware-software":[66,87],"solutions":[67],"execute":[69,79,130],"branches":[70],"conditions":[72],"inefficient.":[74],"In":[75,101],"order":[76],"efficiently":[78],"complicated":[80],"on":[82],"CGRAs,":[83],"we":[84],"present":[85],"hybrid":[88],"solution:":[89],"LASER":[90,139],"-":[91],"comprehensive":[93],"technique":[94],"compute-intensive":[97],"LASER,":[102],"compiler":[103],"transforms":[104],"complex":[105],"loops,":[106],"maps":[107],"them":[108,114],"CGRA,":[111],"lays":[113],"out":[115],"memory":[118],"specific":[121],"manner,":[122],"such":[123],"hardware":[126],"fetch":[128],"instructions":[132],"from":[133],"right":[135],"path":[136],"at":[137],"runtime.":[138],"achieves":[140],"geomean":[142],"improvement":[144],"40.91%":[146],"utilization":[148],"43.43%":[150],"46%":[152],"lower":[153],"energy":[154],"consumption.":[155]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
