{"id":"https://openalex.org/W2798972211","doi":"https://doi.org/10.23919/date.2018.8342111","title":"Efficient synthesis of approximate threshold logic circuits with an error rate guarantee","display_name":"Efficient synthesis of approximate threshold logic circuits with an error rate guarantee","publication_year":2018,"publication_date":"2018-03-01","ids":{"openalex":"https://openalex.org/W2798972211","doi":"https://doi.org/10.23919/date.2018.8342111","mag":"2798972211"},"language":"en","primary_location":{"id":"doi:10.23919/date.2018.8342111","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date.2018.8342111","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072974553","display_name":"Yung-An Lai","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Yung-An Lai","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsincu, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsincu, Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058932938","display_name":"Chia-Chun Lin","orcid":"https://orcid.org/0000-0002-0136-9825"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chia-Chun Lin","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsincu, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsincu, Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014356744","display_name":"Chia\u2010Cheng Wu","orcid":"https://orcid.org/0000-0001-9870-8290"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chia-Cheng Wu","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsincu, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsincu, Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101882689","display_name":"Yung\u2010Chih Chen","orcid":"https://orcid.org/0000-0002-3934-800X"},"institutions":[{"id":"https://openalex.org/I99908691","display_name":"Yuan Ze University","ror":"https://ror.org/01fv1ds98","country_code":"TW","type":"education","lineage":["https://openalex.org/I99908691"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yung-Chih Chen","raw_affiliation_strings":["Department of Computer Science and Engineering, Yuan Ze University, Chungli, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Yuan Ze University, Chungli, Taiwan, R.O.C","institution_ids":["https://openalex.org/I99908691"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5115602054","display_name":"Chun-Yao Wang","orcid":"https://orcid.org/0000-0002-4536-214X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chun-Yao Wang","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsincu, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsincu, Taiwan, R.O.C","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5072974553"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7826,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.73391676,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"773","last_page":"778"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7402541041374207},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6690148115158081},{"id":"https://openalex.org/keywords/word-error-rate","display_name":"Word error rate","score":0.6276532411575317},{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.6003519296646118},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.596908450126648},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5161396265029907},{"id":"https://openalex.org/keywords/approximation-error","display_name":"Approximation error","score":0.4686155915260315},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.46134665608406067},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.43544524908065796},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3823358118534088},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.20518997311592102},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1678796410560608},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.16754361987113953},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.057711660861968994}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7402541041374207},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6690148115158081},{"id":"https://openalex.org/C40969351","wikidata":"https://www.wikidata.org/wiki/Q3516228","display_name":"Word error rate","level":2,"score":0.6276532411575317},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.6003519296646118},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.596908450126648},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5161396265029907},{"id":"https://openalex.org/C122383733","wikidata":"https://www.wikidata.org/wiki/Q865920","display_name":"Approximation error","level":2,"score":0.4686155915260315},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.46134665608406067},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.43544524908065796},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3823358118534088},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.20518997311592102},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1678796410560608},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.16754361987113953},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.057711660861968994},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/date.2018.8342111","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date.2018.8342111","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":48,"referenced_works":["https://openalex.org/W20821090","https://openalex.org/W147529034","https://openalex.org/W1609370892","https://openalex.org/W1662824729","https://openalex.org/W1963605858","https://openalex.org/W1970071120","https://openalex.org/W1977171228","https://openalex.org/W1982780415","https://openalex.org/W2013357016","https://openalex.org/W2017624429","https://openalex.org/W2020217519","https://openalex.org/W2026005150","https://openalex.org/W2043245762","https://openalex.org/W2050129280","https://openalex.org/W2056717940","https://openalex.org/W2071676684","https://openalex.org/W2077813824","https://openalex.org/W2079873320","https://openalex.org/W2104578404","https://openalex.org/W2106360508","https://openalex.org/W2112299196","https://openalex.org/W2112676652","https://openalex.org/W2134090756","https://openalex.org/W2155296713","https://openalex.org/W2161055889","https://openalex.org/W2162433640","https://openalex.org/W2166006610","https://openalex.org/W2267684913","https://openalex.org/W2296186870","https://openalex.org/W2346685430","https://openalex.org/W2401611945","https://openalex.org/W2534141200","https://openalex.org/W2588450655","https://openalex.org/W2611706160","https://openalex.org/W3141620748","https://openalex.org/W3144302451","https://openalex.org/W4230224256","https://openalex.org/W4237060324","https://openalex.org/W4249951793","https://openalex.org/W4250830750","https://openalex.org/W4255029913","https://openalex.org/W6600878772","https://openalex.org/W6606027957","https://openalex.org/W6645922086","https://openalex.org/W6661136662","https://openalex.org/W6676258682","https://openalex.org/W6676901248","https://openalex.org/W6704578084"],"related_works":["https://openalex.org/W2098419840","https://openalex.org/W1966764473","https://openalex.org/W2789349722","https://openalex.org/W1985308002","https://openalex.org/W2121963733","https://openalex.org/W1977171228","https://openalex.org/W2059422871","https://openalex.org/W2766377030","https://openalex.org/W2041787842","https://openalex.org/W2170504327"],"abstract_inverted_index":{"Recently,":[0],"Threshold":[1],"logic":[2,47,61],"attracts":[3],"a":[4,26,53,92,113,119,124],"lot":[5],"of":[6,12,88,121],"attention":[7],"due":[8],"to":[9,20,56,105],"the":[10,17,80,86,97],"advances":[11],"its":[13],"physical":[14],"implementation":[15],"and":[16,51,107],"strong":[18],"binding":[19],"neural":[21],"networks.":[22],"Approximate":[23],"computing":[24,50],"is":[25],"new":[27],"design":[28],"paradigm":[29],"that":[30,79],"focuses":[31],"on":[32,71,109],"error-tolerant":[33],"applications,":[34],"e.g.,":[35],"machine":[36],"learning":[37],"or":[38],"pattern":[39],"recognition.":[40],"In":[41],"this":[42],"paper,":[43],"we":[44],"integrate":[45],"threshold":[46,60],"with":[48,63,112],"approximate":[49,59],"propose":[52],"synthesis":[54],"algorithm":[55,82],"obtain":[57],"cost-efficient":[58],"circuits":[62],"an":[64],"error":[65,94,126],"rate":[66,95,127],"guarantee.":[67],"We":[68],"conduct":[69],"experiments":[70],"IWLS":[72],"2005":[73],"benchmarks.":[74],"The":[75],"experimental":[76],"results":[77],"show":[78],"proposed":[81],"can":[83,100],"efficiently":[84],"explore":[85],"approximability":[87],"each":[89],"benchmark.":[90],"For":[91],"5%":[93,125],"constraint,":[96],"circuit":[98],"cost":[99],"be":[101],"reduced":[102],"by":[103],"up":[104],"65%,":[106],"22.8%":[108],"average.":[110],"Compared":[111],"naive":[114],"method,":[115],"our":[116],"approach":[117],"has":[118],"speedup":[120],"2.42":[122],"under":[123],"constraint.":[128]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1}],"updated_date":"2026-03-27T14:29:43.386196","created_date":"2025-10-10T00:00:00"}
