{"id":"https://openalex.org/W1520678863","doi":"https://doi.org/10.23919/date.2018.8342011","title":"ACCLIB: Accelerators as libraries","display_name":"ACCLIB: Accelerators as libraries","publication_year":2018,"publication_date":"2018-03-01","ids":{"openalex":"https://openalex.org/W1520678863","doi":"https://doi.org/10.23919/date.2018.8342011","mag":"1520678863"},"language":"en","primary_location":{"id":"doi:10.23919/date.2018.8342011","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date.2018.8342011","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044634700","display_name":"Jacob R. Stevens","orcid":"https://orcid.org/0000-0002-7626-2846"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jacob R. Stevens","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University","[School of Electrical and Computer Engineering, Purdue University]"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University","institution_ids":[]},{"raw_affiliation_string":"[School of Electrical and Computer Engineering, Purdue University]","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100541847","display_name":"Yue Du","orcid":"https://orcid.org/0009-0008-7269-7659"},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yue Du","raw_affiliation_strings":["IBM","IBM, ,"],"affiliations":[{"raw_affiliation_string":"IBM","institution_ids":[]},{"raw_affiliation_string":"IBM, ,","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030863988","display_name":"Vivek Kozhikkott","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]},{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Vivek Kozhikkott","raw_affiliation_strings":["Intel Corp, Santa Clara, CA, US","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corp, Santa Clara, CA, US","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065766721","display_name":"Anand Raghunathan","orcid":"https://orcid.org/0000-0002-4624-564X"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anand Raghunathan","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University","[School of Electrical and Computer Engineering, Purdue University]"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University","institution_ids":[]},{"raw_affiliation_string":"[School of Electrical and Computer Engineering, Purdue University]","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5044634700"],"corresponding_institution_ids":["https://openalex.org/I219193219"],"apc_list":null,"apc_paid":null,"fwci":0.2525,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.45184551,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":93},"biblio":{"volume":null,"issue":null,"first_page":"245","last_page":"248"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7819013595581055},{"id":"https://openalex.org/keywords/leverage","display_name":"Leverage (statistics)","score":0.7409329414367676},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.7390968203544617},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.6041761040687561},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.5670501589775085},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.5468392968177795},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5237697958946228},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5034677386283875},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36246174573898315},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3343461751937866},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.3010499179363251},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.28524577617645264},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.16671723127365112},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08174103498458862}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7819013595581055},{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.7409329414367676},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.7390968203544617},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.6041761040687561},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.5670501589775085},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.5468392968177795},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5237697958946228},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5034677386283875},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36246174573898315},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3343461751937866},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.3010499179363251},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.28524577617645264},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.16671723127365112},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08174103498458862}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/date.2018.8342011","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date.2018.8342011","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2018055497","https://openalex.org/W2045365134","https://openalex.org/W2122618466","https://openalex.org/W2171999426","https://openalex.org/W2343695530","https://openalex.org/W4239272107","https://openalex.org/W4243326882","https://openalex.org/W6678212477"],"related_works":["https://openalex.org/W2595172197","https://openalex.org/W2084856301","https://openalex.org/W2127970246","https://openalex.org/W2885125400","https://openalex.org/W1989889224","https://openalex.org/W2612099726","https://openalex.org/W2160632767","https://openalex.org/W2518118925","https://openalex.org/W3159273459","https://openalex.org/W4383749428"],"abstract_inverted_index":{"Accelerator-based":[0],"computing,":[1],"which":[2],"has":[3,90,241],"been":[4],"a":[5,15,29,35,58,131,178,183,188,224],"mainstay":[6],"of":[7,11,18,41,65,104,120,142,151,154,160,190,226,250],"System-on-Chips":[8],"(SoCs)":[9],"is":[10,57,74,94],"growing":[12,118],"interest":[13],"to":[14,27,53,61,71,108,138,176,205,209,218,244,248],"wider":[16],"range":[17],"computing":[19],"systems.":[20],"However,":[21],"the":[22,39,42,45,48,55,62,102,117,152,155,195,202,207,210,238,242,246],"significant":[23],"design":[24,34,132,166],"effort":[25],"required":[26,196],"identify":[28],"computational":[30],"target":[31,179],"for":[32],"acceleration,":[33],"hardware":[36,123,144,161,227],"accelerator,":[37,43,56],"verify":[38],"correctness":[40],"integrate":[44],"accelerator":[46,186],"into":[47],"system,":[49],"and":[50,84,93,163],"rewrite":[51],"applications":[52,222],"use":[54],"major":[59],"bottleneck":[60],"widespread":[63],"adoption":[64,249],"accelerator-based":[66,251],"computing.":[67,252],"The":[68],"classical":[69],"approach":[70,240],"this":[72,126],"problem":[73],"based":[75],"on":[76],"top-down":[77],"methodologies":[78],"such":[79],"as":[80,199,201],"automatic":[81],"HW/SW":[82,197],"partitioning":[83],"high-level":[85],"synthesis":[86],"(HLS).":[87],"While":[88],"HLS":[89],"advanced":[91],"significantly":[92],"seeing":[95],"increased":[96],"adoption,":[97],"it":[98,115,217],"does":[99,114],"not":[100],"leverage":[101,116],"ability":[103],"experienced":[105],"human":[106],"designers":[107],"craft":[109],"highly":[110],"optimized":[111],"RTL,":[112],"nor":[113],"body":[119],"already":[121],"existing":[122,140],"accelerators.":[124,191],"In":[125],"work,":[127],"we":[128],"propose":[129],"ACCLIB,":[130],"framework":[133],"that":[134,237],"allows":[135],"software":[136,180],"developers":[137],"utilize":[139],"libraries":[141],"predesigned":[143],"accelerators":[145,228],"automatically":[146],"with":[147,157,164,182],"no":[148],"prior":[149],"knowledge":[150,159],"function":[153,181],"accelerators,":[156],"minimal":[158,165],"design,":[162],"effort.":[167],"To":[168],"accomplish":[169],"this,":[170],"ACCLIB":[171,214],"uses":[172],"formal":[173],"verification":[174],"techniques":[175],"match":[177],"functionally":[184],"equivalent":[185],"from":[187],"library":[189,225],"It":[192],"also":[193],"generates":[194],"interfaces":[198],"well":[200],"code":[203],"necessary":[204],"offload":[206],"computation":[208],"accelerator.":[211],"We":[212],"validate":[213],"by":[215],"applying":[216],"accelerate":[219],"six":[220],"different":[221],"using":[223],"in":[229],"just":[230],"over":[231],"one":[232],"hour":[233],"per":[234],"application,":[235],"demonstrating":[236],"proposed":[239],"potential":[243],"lower":[245],"barrier":[247]},"counts_by_year":[{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}