{"id":"https://openalex.org/W2613933964","doi":"https://doi.org/10.23919/date.2017.7927268","title":"Information flow tracking in analog/mixed-signal designs through proof-carrying hardware IP","display_name":"Information flow tracking in analog/mixed-signal designs through proof-carrying hardware IP","publication_year":2017,"publication_date":"2017-03-01","ids":{"openalex":"https://openalex.org/W2613933964","doi":"https://doi.org/10.23919/date.2017.7927268","mag":"2613933964"},"language":"en","primary_location":{"id":"doi:10.23919/date.2017.7927268","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date.2017.7927268","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE), 2017","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042564597","display_name":"Mohammad-Mahdi Bidmeshki","orcid":null},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Mohammad-Mahdi Bidmeshki","raw_affiliation_strings":["Department of Electrical Engineering, The University of Texas at Dallas, Richardson, Texas"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, The University of Texas at Dallas, Richardson, Texas","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068783983","display_name":"Angelos Antonopoulos","orcid":"https://orcid.org/0000-0002-4145-5998"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Angelos Antonopoulos","raw_affiliation_strings":["Department of Electrical Engineering, The University of Texas at Dallas, Richardson, Texas"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, The University of Texas at Dallas, Richardson, Texas","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078818440","display_name":"Yiorgos Makris","orcid":"https://orcid.org/0000-0002-4322-0068"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yiorgos Makris","raw_affiliation_strings":["Department of Electrical Engineering, The University of Texas at Dallas, Richardson, Texas"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, The University of Texas at Dallas, Richardson, Texas","institution_ids":["https://openalex.org/I162577319"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5042564597"],"corresponding_institution_ids":["https://openalex.org/I162577319"],"apc_list":null,"apc_paid":null,"fwci":2.4785,"has_fulltext":false,"cited_by_count":22,"citation_normalized_percentile":{"value":0.90534587,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11241","display_name":"Advanced Malware Detection Techniques","score":0.9937000274658203,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7276875376701355},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.6580888032913208},{"id":"https://openalex.org/keywords/information-leakage","display_name":"Information leakage","score":0.6127062439918518},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.5890830159187317},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5329400300979614},{"id":"https://openalex.org/keywords/analog-image-processing","display_name":"Analog image processing","score":0.49674445390701294},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4824719727039337},{"id":"https://openalex.org/keywords/analog-multiplier","display_name":"Analog multiplier","score":0.47095686197280884},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.465060293674469},{"id":"https://openalex.org/keywords/analog-front-end","display_name":"Analog front-end","score":0.46163105964660645},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.45546942949295044},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.44705384969711304},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4176432490348816},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36675938963890076},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3389729857444763},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.3367844223976135},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.31691426038742065},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17947468161582947},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17394551634788513},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.13293519616127014},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.08016425371170044}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7276875376701355},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.6580888032913208},{"id":"https://openalex.org/C2779201187","wikidata":"https://www.wikidata.org/wiki/Q2775060","display_name":"Information leakage","level":2,"score":0.6127062439918518},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.5890830159187317},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5329400300979614},{"id":"https://openalex.org/C28525508","wikidata":"https://www.wikidata.org/wiki/Q4751054","display_name":"Analog image processing","level":5,"score":0.49674445390701294},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4824719727039337},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.47095686197280884},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.465060293674469},{"id":"https://openalex.org/C2778870119","wikidata":"https://www.wikidata.org/wiki/Q16002927","display_name":"Analog front-end","level":3,"score":0.46163105964660645},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.45546942949295044},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.44705384969711304},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4176432490348816},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36675938963890076},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3389729857444763},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3367844223976135},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.31691426038742065},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17947468161582947},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17394551634788513},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.13293519616127014},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.08016425371170044},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C193828747","wikidata":"https://www.wikidata.org/wiki/Q864118","display_name":"Binary image","level":4,"score":0.0},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/date.2017.7927268","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date.2017.7927268","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE), 2017","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/16","score":0.4399999976158142,"display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W324409780","https://openalex.org/W1484614106","https://openalex.org/W1579574516","https://openalex.org/W1965573937","https://openalex.org/W1976955200","https://openalex.org/W2050351395","https://openalex.org/W2054362794","https://openalex.org/W2068118521","https://openalex.org/W2089828930","https://openalex.org/W2100666033","https://openalex.org/W2101152030","https://openalex.org/W2109768653","https://openalex.org/W2122049982","https://openalex.org/W2131129639","https://openalex.org/W2136296832","https://openalex.org/W2290638032","https://openalex.org/W2314433168","https://openalex.org/W2464661970","https://openalex.org/W2511192821","https://openalex.org/W4237770726","https://openalex.org/W4246349508","https://openalex.org/W6675305138"],"related_works":["https://openalex.org/W2365016061","https://openalex.org/W2061402905","https://openalex.org/W4233024123","https://openalex.org/W2323148014","https://openalex.org/W1792053179","https://openalex.org/W1862020018","https://openalex.org/W4242258007","https://openalex.org/W2008534674","https://openalex.org/W3039102420","https://openalex.org/W2169924428"],"abstract_inverted_index":{"Information":[0],"flow":[1,153],"tracking":[2],"(IFT)":[3],"is":[4,58,172],"a":[5,84,143],"widely":[6],"used":[7],"methodology":[8,40,145],"for":[9,41],"ensuring":[10],"data":[11,177],"confidentiality":[12],"in":[13,46,116,138,155],"electronic":[14],"systems":[15],"and":[16,167,187],"numerous":[17],"such":[18,74,119],"methods":[19],"have":[20],"been":[21],"developed":[22],"at":[23],"various":[24],"software":[25],"or":[26,88,127],"hardware":[27,33,43,47],"description":[28,48],"levels.":[29],"Among":[30],"them,":[31],"proof-carrying":[32],"intellectual":[34],"property":[35],"(PCHIP)":[36],"introduced":[37],"an":[38],"IFT":[39,163],"digital":[42,63,94,166,181],"designs":[44],"described":[45],"languages":[49],"(HDLs).":[50],"The":[51],"risk":[52],"of":[53,71,83,108,151,194],"accidental":[54],"information":[55,104,120,152],"leakage,":[56],"however,":[57],"not":[59],"restricted":[60],"to":[61,93,174,183],"the":[62,114,125,165,180,184,195],"domain.":[64],"Indeed,":[65],"analog":[66,81,96,168,185],"signals":[67],"originating":[68],"from":[69,179],"sources":[70],"sensitive":[72,176],"information,":[73],"as":[75,78,80],"biometric":[76],"sensors,":[77],"well":[79],"outputs":[82],"circuit,":[85],"could":[86],"carry":[87],"leak":[89],"secrets.":[90],"Moreover,":[91],"similar":[92],"designs,":[95],"circuits":[97,118],"can":[98,123],"also":[99],"be":[100],"contaminated":[101],"with":[102],"malicious":[103],"leakage":[105,121,178],"channels":[106,122],"capable":[107],"evading":[109],"traditional":[110],"manufacturing":[111],"test.":[112],"Compounding":[113],"problem,":[115],"analog/mixed-signal":[117,156,197],"cross":[124],"analog/digital":[126],"digital/analog":[128],"interface,":[129],"making":[130],"their":[131],"detection":[132],"even":[133],"harder.":[134],"To":[135],"this":[136,139],"end,":[137],"paper":[140],"we":[141,159],"introduce":[142],"PCHIP-based":[144],"which":[146],"enables":[147],"systematic":[148],"formal":[149],"evaluation":[150],"policies":[154],"designs.":[157],"As":[158],"demonstrate,":[160],"by":[161],"integrating":[162],"across":[164],"domain,":[169],"our":[170],"method":[171],"able":[173],"detect":[175],"domain":[182,186],"vice":[188],"versa,":[189],"without":[190],"requiring":[191],"any":[192],"modification":[193],"current":[196],"circuit":[198],"design":[199],"flow.":[200]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
