{"id":"https://openalex.org/W2612034060","doi":"https://doi.org/10.23919/date.2017.7927051","title":"Architectural evaluations on TSV redundancy for reliability enhancement","display_name":"Architectural evaluations on TSV redundancy for reliability enhancement","publication_year":2017,"publication_date":"2017-03-01","ids":{"openalex":"https://openalex.org/W2612034060","doi":"https://doi.org/10.23919/date.2017.7927051","mag":"2612034060"},"language":"en","primary_location":{"id":"doi:10.23919/date.2017.7927051","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date.2017.7927051","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101535357","display_name":"Yen-Hao Chen","orcid":"https://orcid.org/0000-0002-5456-8393"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Yen-Hao Chen","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021356204","display_name":"Chien-Pang Chiu","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chien-Pang Chiu","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038388329","display_name":"Russell Barnes","orcid":null},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Russell Barnes","raw_affiliation_strings":["University of California Santa Barbara, Santa Barbara, CA, US"],"affiliations":[{"raw_affiliation_string":"University of California Santa Barbara, Santa Barbara, CA, US","institution_ids":["https://openalex.org/I154570441"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043578401","display_name":"TingTing Hwang","orcid":"https://orcid.org/0000-0002-7206-560X"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"TingTing Hwang","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5101535357"],"corresponding_institution_ids":["https://openalex.org/I25846049"],"apc_list":null,"apc_paid":null,"fwci":0.5734,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.68601571,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"566","last_page":"571"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10783","display_name":"Additive Manufacturing and 3D Printing Technologies","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/2203","display_name":"Automotive Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.8606315851211548},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5823050141334534},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5659892559051514},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.5353600978851318},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4939783215522766},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.44368234276771545},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.43729567527770996},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.42497891187667847},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4151347875595093},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.4126799404621124},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.33352506160736084},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14835962653160095},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.06933626532554626}],"concepts":[{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.8606315851211548},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5823050141334534},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5659892559051514},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.5353600978851318},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4939783215522766},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.44368234276771545},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43729567527770996},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.42497891187667847},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4151347875595093},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.4126799404621124},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.33352506160736084},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14835962653160095},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.06933626532554626},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.23919/date.2017.7927051","is_oa":false,"landing_page_url":"https://doi.org/10.23919/date.2017.7927051","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4699999988079071,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1987638749","https://openalex.org/W2005613478","https://openalex.org/W2010009884","https://openalex.org/W2013376612","https://openalex.org/W2039742323","https://openalex.org/W2050832669","https://openalex.org/W2067880091","https://openalex.org/W2072609296","https://openalex.org/W2107304970","https://openalex.org/W2107868198","https://openalex.org/W2151755625","https://openalex.org/W2154517054","https://openalex.org/W3142235025","https://openalex.org/W3143398174","https://openalex.org/W4255435342","https://openalex.org/W6660540487"],"related_works":["https://openalex.org/W2027159884","https://openalex.org/W1990828594","https://openalex.org/W2089377260","https://openalex.org/W2046139226","https://openalex.org/W2513353273","https://openalex.org/W2549021975","https://openalex.org/W2333804548","https://openalex.org/W4399621287","https://openalex.org/W1968957853","https://openalex.org/W2310189477"],"abstract_inverted_index":{"Three-dimensional":[0],"Integrated":[1],"Circuits":[2],"(3D-ICs)":[3],"is":[4],"a":[5,11,120,134],"next-generation":[6],"technology":[7],"that":[8,26,38,146],"could":[9],"be":[10,29],"solution":[12],"to":[13,43,65,125,132],"overcome":[14],"the":[15,39,44,54,71,97,112,127,142,149,152],"scaling":[16],"problem.":[17],"It":[18],"stacks":[19],"dies":[20,32],"with":[21,74],"Through-Silicon":[22],"Vias":[23],"(TSVs)":[24],"so":[25],"signals":[27],"can":[28,84,147],"transmitted":[30],"through":[31],"vertically.":[33],"However,":[34],"researchers":[35],"have":[36,62],"noticed":[37],"aging":[40],"effect":[41],"due":[42],"electormigration":[45],"(EM)":[46],"may":[47],"result":[48],"in":[49,104],"faulty":[50,72],"TSVs":[51,76],"and":[52,88,108,137,155],"affect":[53],"chip":[55],"lifetime":[56],"[1].":[57],"Several":[58],"redundant":[59,75,101,128],"TSV":[60,73,102,129,153,156],"architectures":[61,103],"been":[63],"proposed":[64],"address":[66],"this":[67,92],"issue.":[68],"By":[69],"replacing":[70],"which":[77],"are":[78],"added":[79],"at":[80],"design":[81,133,144],"time,":[82],"chips":[83],"achieve":[85],"better":[86],"reliability":[87,115],"longer":[89],"lifetime.":[90],"In":[91],"paper,":[93],"we":[94,118,140],"will":[95],"study":[96],"tradeoff":[98],"of":[99,106,114,151],"various":[100],"terms":[105],"effectiveness":[107],"cost.":[109],"To":[110],"allow":[111],"measurement":[113],"more":[116,135],"realistically,":[117],"propose":[119],"new":[121],"standard,":[122],"repair":[123],"rate,":[124],"appraise":[126],"architectures.":[130],"Moreover,":[131],"flexible":[136],"efficient":[138],"structure,":[139],"enhance":[141],"ring-based":[143],"[2]":[145],"adjust":[148],"size":[150],"block":[154],"redundancy.":[157]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}