{"id":"https://openalex.org/W2775674862","doi":"https://doi.org/10.18420/in2017_44","title":"Hardware Accelerator Framework Approach for Dynamic Partial Reconfigurable Overlays on Xilinx PYNQ","display_name":"Hardware Accelerator Framework Approach for Dynamic Partial Reconfigurable Overlays on Xilinx PYNQ","publication_year":2017,"publication_date":"2017-01-01","ids":{"openalex":"https://openalex.org/W2775674862","doi":"https://doi.org/10.18420/in2017_44","mag":"2775674862"},"language":"en","primary_location":{"id":"doi:10.18420/in2017_44","is_oa":true,"landing_page_url":"https://doi.org/10.18420/in2017_44","pdf_url":null,"source":{"id":"https://openalex.org/S7407052918","display_name":"Gesellschaft f\u00fcr Informatik (GI)","issn_l":null,"issn":[],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article-journal"},"type":"article","indexed_in":["datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://doi.org/10.18420/in2017_44","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014124149","display_name":"Benedikt Jan\u00dfen","orcid":"https://orcid.org/0000-0002-4512-9268"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Jan\u00dfen, Benedikt","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070192804","display_name":"Tim Wingender","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Wingender, Tim","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5108437484","display_name":"Michael H\u00fcbner","orcid":"https://orcid.org/0000-0003-3785-7959"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"H\u00fcbner, Michael","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5014124149"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.19478509,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":93},"biblio":{"volume":null,"issue":null,"first_page":"481","last_page":"492"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9190000295639038,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9190000295639038,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.7257046699523926},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5847477912902832},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4900628328323364},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.477251261472702},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.28028327226638794}],"concepts":[{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.7257046699523926},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5847477912902832},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4900628328323364},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.477251261472702},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.28028327226638794}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.18420/in2017_44","is_oa":true,"landing_page_url":"https://doi.org/10.18420/in2017_44","pdf_url":null,"source":{"id":"https://openalex.org/S7407052918","display_name":"Gesellschaft f\u00fcr Informatik (GI)","issn_l":null,"issn":[],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"article-journal"},{"id":"mag:2775674862","is_oa":false,"landing_page_url":"https://dblp.uni-trier.de/db/conf/gi/gi2017.html#JanssenWH17","pdf_url":null,"source":{"id":"https://openalex.org/S4306511462","display_name":"GI-Jahrestagung","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":"GI-Jahrestagung","raw_type":null}],"best_oa_location":{"id":"doi:10.18420/in2017_44","is_oa":true,"landing_page_url":"https://doi.org/10.18420/in2017_44","pdf_url":null,"source":{"id":"https://openalex.org/S7407052918","display_name":"Gesellschaft f\u00fcr Informatik (GI)","issn_l":null,"issn":[],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article-journal"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W24100904","https://openalex.org/W2589684773","https://openalex.org/W2390254310","https://openalex.org/W578123067","https://openalex.org/W1910046164","https://openalex.org/W2464778015","https://openalex.org/W3165063165","https://openalex.org/W2506463209","https://openalex.org/W2352171493","https://openalex.org/W2403150460","https://openalex.org/W2043254774","https://openalex.org/W2079055933","https://openalex.org/W1840953437","https://openalex.org/W2169565913","https://openalex.org/W2075283644","https://openalex.org/W2252569630","https://openalex.org/W2109480492","https://openalex.org/W3133109843","https://openalex.org/W2080556528","https://openalex.org/W2149497591"],"abstract_inverted_index":{"Reconfigurable":[0],"System-on-Chips":[1],"(SoC)":[2],"combine":[3],"processor":[4],"cores":[5],"with":[6],"Field-Programmable":[7],"Gate":[8],"Array":[9],"(FPGA)":[10],"fabric.":[11,31],"Thereby,":[12],"these":[13],"systems":[14],"enable":[15],"to":[16,22,54,74,100],"optimize":[17],"the":[18,29,40,56,83,86,102],"execution":[19],"of":[20,58,77,85,97,104],"application":[21],"some":[23],"extend":[24],"by":[25,61],"hardware":[26,33,43,64,105],"accelerators":[27,106],"in":[28,107],"FPGA":[30,59],"However,":[32],"accelerator":[34],"development":[35,44],"requires":[36],"special":[37],"skills":[38],"from":[39,47],"developer":[41],"since":[42],"differs":[45],"substantial":[46],"software":[48],"development.":[49],"Overlays":[50],"offer":[51],"a":[52,94],"way":[53],"abstract":[55],"complexity":[57],"usage":[60],"predefined":[62],"programmable":[63],"architectures.":[65],"With":[66],"Dynamic":[67],"Partial":[68],"reconfiguration":[69],"(DPR)":[70],"it":[71],"becomes":[72],"possible":[73],"exchange":[75],"parts":[76],"an":[78],"overlay\u2019s":[79],"architecture":[80],"without":[81],"affecting":[82],"operation":[84],"remaining":[87],"parts.":[88],"In":[89],"this":[90],"article,":[91],"we":[92],"present":[93],"first":[95],"version":[96],"our":[98,127],"framework":[99,122],"ease":[101],"integration":[103,113],"Python":[108,115,128],"via":[109],"DPR":[110],"overlays.":[111],"The":[112,121],"into":[114],"is":[116,124],"based":[117,125],"on":[118,126],"Xilinx":[119],"PYNQ.":[120],"approach":[123],"package":[129],"\u2018pynqpartial\u2019.":[130]},"counts_by_year":[{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T06:51:31.235846","created_date":"2025-10-10T00:00:00"}