{"id":"https://openalex.org/W2298036307","doi":"https://doi.org/10.1631/fitee.1500210","title":"Design and simulation of a standing wave oscillator based PLL","display_name":"Design and simulation of a standing wave oscillator based PLL","publication_year":2016,"publication_date":"2016-03-01","ids":{"openalex":"https://openalex.org/W2298036307","doi":"https://doi.org/10.1631/fitee.1500210","mag":"2298036307"},"language":"en","primary_location":{"id":"doi:10.1631/fitee.1500210","is_oa":false,"landing_page_url":"https://doi.org/10.1631/fitee.1500210","pdf_url":null,"source":{"id":"https://openalex.org/S4210189857","display_name":"Frontiers of Information Technology & Electronic Engineering","issn_l":"2095-9184","issn":["2095-9184","2095-9230"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Frontiers of Information Technology &amp; Electronic Engineering","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100618890","display_name":"Wei Zhang","orcid":"https://orcid.org/0000-0001-7607-9235"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Wei Zhang","raw_affiliation_strings":["State Key Lab of ASIC & System, Fudan University, Shanghai, 200433, China","State Key Lab of ASIC & System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Lab of ASIC & System, Fudan University, Shanghai, 200433, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab of ASIC & System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043781138","display_name":"Youde Hu","orcid":"https://orcid.org/0009-0003-1213-7522"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"You-de Hu","raw_affiliation_strings":["State Key Lab of ASIC & System, Fudan University, Shanghai, 200433, China","State Key Lab of ASIC & System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Lab of ASIC & System, Fudan University, Shanghai, 200433, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab of ASIC & System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024591419","display_name":"Lirong Zheng","orcid":"https://orcid.org/0000-0003-0888-6769"},"institutions":[{"id":"https://openalex.org/I86987016","display_name":"KTH Royal Institute of Technology","ror":"https://ror.org/026vcq606","country_code":"SE","type":"education","lineage":["https://openalex.org/I86987016"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Li-rong Zheng","raw_affiliation_strings":["Pack Vinn Excellence Center, School of ICT, Royal Institute of Technology (KTH) Eletrum 229, Kista-Stockholm, 16440, Sweden","Pack Vinn Excellence Center, School of ICT, Royal Institute of Technology (KTH) Eletrum 229, Kista-Stockholm, Sweden"],"affiliations":[{"raw_affiliation_string":"Pack Vinn Excellence Center, School of ICT, Royal Institute of Technology (KTH) Eletrum 229, Kista-Stockholm, 16440, Sweden","institution_ids":["https://openalex.org/I86987016"]},{"raw_affiliation_string":"Pack Vinn Excellence Center, School of ICT, Royal Institute of Technology (KTH) Eletrum 229, Kista-Stockholm, Sweden","institution_ids":["https://openalex.org/I86987016"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100618890"],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":0.5513,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.69397968,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"17","issue":"3","first_page":"258","last_page":"264"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8247816562652588},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.5339428782463074},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5290956497192383},{"id":"https://openalex.org/keywords/varicap","display_name":"Varicap","score":0.5262510180473328},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5085445642471313},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.46244245767593384},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.45732226967811584},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.43329498171806335},{"id":"https://openalex.org/keywords/pll-multibit","display_name":"PLL multibit","score":0.43077442049980164},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4217737019062042},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.41775181889533997},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.41554051637649536},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.37798500061035156},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.35970014333724976},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.35486525297164917},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.32160836458206177},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2682512402534485},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.24045658111572266},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.14293155074119568}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8247816562652588},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.5339428782463074},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5290956497192383},{"id":"https://openalex.org/C15485314","wikidata":"https://www.wikidata.org/wiki/Q467463","display_name":"Varicap","level":4,"score":0.5262510180473328},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5085445642471313},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.46244245767593384},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.45732226967811584},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.43329498171806335},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.43077442049980164},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4217737019062042},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.41775181889533997},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.41554051637649536},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.37798500061035156},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.35970014333724976},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.35486525297164917},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.32160836458206177},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2682512402534485},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.24045658111572266},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.14293155074119568},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1631/fitee.1500210","is_oa":false,"landing_page_url":"https://doi.org/10.1631/fitee.1500210","pdf_url":null,"source":{"id":"https://openalex.org/S4210189857","display_name":"Frontiers of Information Technology & Electronic Engineering","issn_l":"2095-9184","issn":["2095-9184","2095-9230"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Frontiers of Information Technology &amp; Electronic Engineering","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1505272351","https://openalex.org/W1984845646","https://openalex.org/W2122724421","https://openalex.org/W2149381525","https://openalex.org/W2157488385","https://openalex.org/W2166694777","https://openalex.org/W2169287990","https://openalex.org/W2170639273","https://openalex.org/W2505236094","https://openalex.org/W2788078241","https://openalex.org/W3141822326"],"related_works":["https://openalex.org/W2090237663","https://openalex.org/W2116514610","https://openalex.org/W1506442459","https://openalex.org/W2052455055","https://openalex.org/W2003180247","https://openalex.org/W4386968318","https://openalex.org/W331180034","https://openalex.org/W853533475","https://openalex.org/W4321517886","https://openalex.org/W1526416583"],"abstract_inverted_index":{"A":[0],"standing":[1],"wave":[2],"oscillator":[3],"(SWO)":[4],"is":[5,30,86],"a":[6,16,22,37,44,58,79,96,102,139],"perfect":[7],"clock":[8,19,97,103,110],"source":[9],"which":[10,48],"can":[11,90,134],"be":[12,91,135],"used":[13,92,136],"to":[14,32,106],"produce":[15],"high":[17,26,108,140],"frequency":[18,45,67,76,118],"signal":[20],"with":[21],"low":[23],"skew":[24],"and":[25,60,70,133],"reliability.":[27],"However,":[28],"it":[29],"difficult":[31],"tune":[33],"the":[34,62,66,75],"SWO":[35,47],"in":[36,123,138],"wide":[38],"range":[39,69,120],"of":[40,65],"frequencies.":[41],"We":[42],"introduce":[43],"tunable":[46,77],"uses":[49],"an":[50,115],"inversion":[51],"mode":[52],"metal-oxide-semiconductor":[53,130],"(IMOS)":[54],"field-effect":[55],"transistor":[56],"as":[57,95,101],"varactor,":[59],"give":[61],"simulation":[63],"results":[64],"tuning":[68,119],"power":[71],"dissipation.":[72],"Based":[73],"on":[74],"SWO,":[78],"new":[80],"phase":[81],"locked":[82],"loop":[83],"(PLL)":[84],"architecture":[85],"presented.":[87],"This":[88],"PLL":[89,113],"not":[93],"only":[94],"source,":[98],"but":[99],"also":[100],"distribution":[104],"network":[105],"provide":[107],"quality":[109],"signals.":[111],"The":[112],"achieves":[114],"approximately":[116],"50%":[117],"when":[121],"designed":[122],"Global":[124],"Foundry":[125],"65":[126],"nm":[127],"1P9M":[128],"complementary":[129],"(CMOS)":[131],"technology,":[132],"directly":[137],"performance":[141],"multi-core":[142],"microprocessor.":[143]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":2}],"updated_date":"2026-02-22T13:39:03.778224","created_date":"2025-10-10T00:00:00"}
