{"id":"https://openalex.org/W4405744797","doi":"https://doi.org/10.1587/transfun.2024eap1114","title":"Systematic Offset Voltage Reduction Methods Using Half-Circuit of Input Stage in the Two-Stage CMOS Operational Amplifiers and Comparators","display_name":"Systematic Offset Voltage Reduction Methods Using Half-Circuit of Input Stage in the Two-Stage CMOS Operational Amplifiers and Comparators","publication_year":2024,"publication_date":"2024-12-24","ids":{"openalex":"https://openalex.org/W4405744797","doi":"https://doi.org/10.1587/transfun.2024eap1114"},"language":"en","primary_location":{"id":"doi:10.1587/transfun.2024eap1114","is_oa":true,"landing_page_url":"https://doi.org/10.1587/transfun.2024eap1114","pdf_url":"https://www.jstage.jst.go.jp/article/transfun/E108.A/7/E108.A_2024EAP1114/_pdf","source":{"id":"https://openalex.org/S166990724","display_name":"IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences","issn_l":"0916-8508","issn":["0916-8508","1745-1337"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://www.jstage.jst.go.jp/article/transfun/E108.A/7/E108.A_2024EAP1114/_pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Kazumasa ARIMURA","orcid":null},"institutions":[{"id":"https://openalex.org/I118574687","display_name":"University of Miyazaki","ror":"https://ror.org/0447kww10","country_code":"JP","type":"education","lineage":["https://openalex.org/I118574687"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kazumasa ARIMURA","raw_affiliation_strings":["Department of Materials and Informatics, Interdisciplinary Graduate School of Agriculture and Engineering, Miyazaki University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Materials and Informatics, Interdisciplinary Graduate School of Agriculture and Engineering, Miyazaki University","institution_ids":["https://openalex.org/I118574687"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060091667","display_name":"Ryoichi Miyauchi","orcid":"https://orcid.org/0000-0002-4323-1808"},"institutions":[{"id":"https://openalex.org/I161296585","display_name":"Tokyo University of Science","ror":"https://ror.org/05sj3n476","country_code":"JP","type":"education","lineage":["https://openalex.org/I161296585"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Ryoichi MIYAUCHI","raw_affiliation_strings":["Department of Electrical Engineering, Faculty of Science and Technology, Tokyo University of Science"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Faculty of Science and Technology, Tokyo University of Science","institution_ids":["https://openalex.org/I161296585"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051384010","display_name":"Koichi Tanno","orcid":null},"institutions":[{"id":"https://openalex.org/I118574687","display_name":"University of Miyazaki","ror":"https://ror.org/0447kww10","country_code":"JP","type":"education","lineage":["https://openalex.org/I118574687"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Koichi TANNO","raw_affiliation_strings":["Faculty of Engineering, University of Miyazaki"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Engineering, University of Miyazaki","institution_ids":["https://openalex.org/I118574687"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.13667898,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"E108.A","issue":"7","first_page":"928","last_page":"936"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9918000102043152,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.8586922883987427},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7214013934135437},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.6674487590789795},{"id":"https://openalex.org/keywords/input-offset-voltage","display_name":"Input offset voltage","score":0.649664580821991},{"id":"https://openalex.org/keywords/stage","display_name":"Stage (stratigraphy)","score":0.5905137658119202},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.5615670084953308},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.5337091088294983},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.478019118309021},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4553256034851074},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4387274384498596},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.42083457112312317},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.410493403673172},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1795654296875},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13482782244682312}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.8586922883987427},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7214013934135437},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.6674487590789795},{"id":"https://openalex.org/C63651839","wikidata":"https://www.wikidata.org/wiki/Q478566","display_name":"Input offset voltage","level":5,"score":0.649664580821991},{"id":"https://openalex.org/C146357865","wikidata":"https://www.wikidata.org/wiki/Q1123245","display_name":"Stage (stratigraphy)","level":2,"score":0.5905137658119202},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.5615670084953308},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.5337091088294983},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.478019118309021},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4553256034851074},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4387274384498596},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.42083457112312317},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.410493403673172},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1795654296875},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13482782244682312},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/transfun.2024eap1114","is_oa":true,"landing_page_url":"https://doi.org/10.1587/transfun.2024eap1114","pdf_url":"https://www.jstage.jst.go.jp/article/transfun/E108.A/7/E108.A_2024EAP1114/_pdf","source":{"id":"https://openalex.org/S166990724","display_name":"IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences","issn_l":"0916-8508","issn":["0916-8508","1745-1337"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1587/transfun.2024eap1114","is_oa":true,"landing_page_url":"https://doi.org/10.1587/transfun.2024eap1114","pdf_url":"https://www.jstage.jst.go.jp/article/transfun/E108.A/7/E108.A_2024EAP1114/_pdf","source":{"id":"https://openalex.org/S166990724","display_name":"IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences","issn_l":"0916-8508","issn":["0916-8508","1745-1337"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences","raw_type":"journal-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8500000238418579,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4405744797.pdf","grobid_xml":"https://content.openalex.org/works/W4405744797.grobid-xml"},"referenced_works_count":20,"referenced_works":["https://openalex.org/W1494240561","https://openalex.org/W1550722621","https://openalex.org/W1570258487","https://openalex.org/W1981270599","https://openalex.org/W2048548740","https://openalex.org/W2053759576","https://openalex.org/W2078928965","https://openalex.org/W2092229515","https://openalex.org/W2096760280","https://openalex.org/W2104609839","https://openalex.org/W2124050425","https://openalex.org/W2157836738","https://openalex.org/W2167064748","https://openalex.org/W2545068135","https://openalex.org/W2551341368","https://openalex.org/W2775023910","https://openalex.org/W2807497579","https://openalex.org/W3095811284","https://openalex.org/W4283732627","https://openalex.org/W4291701212"],"related_works":["https://openalex.org/W2136440001","https://openalex.org/W2107423283","https://openalex.org/W1965493748","https://openalex.org/W2122001378","https://openalex.org/W1951127657","https://openalex.org/W1901843583","https://openalex.org/W2797920886","https://openalex.org/W1560414352","https://openalex.org/W3214591077","https://openalex.org/W2135250276"],"abstract_inverted_index":{"In":[0],"this":[1],"study,":[2],"we":[3,76,111],"propose":[4],"the":[5,12,18,30,33,40,44,51,55,63,73,78,84,114,119],"systematic":[6,93,120],"offset":[7,94,121],"voltage":[8,49,95,122],"reduction":[9],"method":[10,28,80,116],"considering":[11],"channel":[13,64],"length":[14,65],"modulation":[15,66],"effect":[16,67],"for":[17],"two-stage":[19,37],"CMOS":[20],"operational":[21],"amplifiers":[22],"(Op-Amps)":[23],"and":[24,57,62,88,98],"comparators.":[25],"The":[26,92],"proposed":[27,45,74,79,115],"employs":[29],"half-circuit":[31],"of":[32,50],"input":[34,56],"stage":[35],"in":[36,54],"Op-Amps":[38,82],"as":[39],"output":[41,58],"stage.":[42],"Using":[43],"method,":[46,75],"each":[47],"terminal":[48],"MOS":[52],"transistors":[53],"stages":[59],"is":[60],"aligned,":[61],"can":[68,117],"be":[69],"ignored.":[70],"To":[71],"generalize":[72],"applied":[77],"to":[81],"with":[83,104],"cascode":[85],"active":[86],"load":[87],"differential":[89],"difference":[90],"amplifier.":[91],"was":[96],"evaluated":[97],"compared":[99],"by":[100,123],"simulation":[101],"using":[102],"HSPICE":[103],"TSMC":[105],"0.18":[106],"\u03bcm":[107],"model":[108],"parameters.":[109],"Consequently,":[110],"confirmed":[112],"that":[113],"reduce":[118],"95%":[124],"or":[125],"more.":[126]},"counts_by_year":[],"updated_date":"2026-08-18T07:49:30.821534","created_date":"2025-10-10T00:00:00"}
