{"id":"https://openalex.org/W3008043263","doi":"https://doi.org/10.1587/transele.2019lhp0010","title":"Local Memory Mapping of Multicore Processors on an Automatic Parallelizing Compiler","display_name":"Local Memory Mapping of Multicore Processors on an Automatic Parallelizing Compiler","publication_year":2020,"publication_date":"2020-02-29","ids":{"openalex":"https://openalex.org/W3008043263","doi":"https://doi.org/10.1587/transele.2019lhp0010","mag":"3008043263"},"language":"en","primary_location":{"id":"doi:10.1587/transele.2019lhp0010","is_oa":false,"landing_page_url":"https://doi.org/10.1587/transele.2019lhp0010","pdf_url":null,"source":{"id":"https://openalex.org/S2489501747","display_name":"IEICE Transactions on Electronics","issn_l":"0916-8524","issn":["0916-8524","1745-1353"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Transactions on Electronics","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078011005","display_name":"Yoshitake Oki","orcid":null},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Yoshitake OKI","raw_affiliation_strings":["Department of Computer Science and Engineering, Waseda University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Waseda University","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109474877","display_name":"Yuto Abe","orcid":null},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yuto ABE","raw_affiliation_strings":["Department of Computer Science and Engineering, Waseda University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Waseda University","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102861326","display_name":"Kazuki Yamamoto","orcid":"https://orcid.org/0000-0001-6231-0475"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kazuki YAMAMOTO","raw_affiliation_strings":["Department of Computer Science and Engineering, Waseda University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Waseda University","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102501626","display_name":"Kohei Yamamoto","orcid":"https://orcid.org/0000-0002-1733-458X"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kohei YAMAMOTO","raw_affiliation_strings":["Department of Computer Science and Engineering, Waseda University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Waseda University","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070669340","display_name":"Tomoya Shirakawa","orcid":"https://orcid.org/0009-0004-6046-5739"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Tomoya SHIRAKAWA","raw_affiliation_strings":["Department of Computer Science and Engineering, Waseda University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Waseda University","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112291448","display_name":"Akimasa Yoshida","orcid":null},"institutions":[{"id":"https://openalex.org/I16656306","display_name":"Meiji University","ror":"https://ror.org/02rqvrp93","country_code":"JP","type":"education","lineage":["https://openalex.org/I16656306"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Akimasa YOSHIDA","raw_affiliation_strings":["School of Interdisciplinary Mathematical Sciences, Meiji University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Interdisciplinary Mathematical Sciences, Meiji University","institution_ids":["https://openalex.org/I16656306"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069030970","display_name":"Keiji Kimura","orcid":"https://orcid.org/0000-0003-2325-4866"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Keiji KIMURA","raw_affiliation_strings":["Department of Computer Science and Engineering, Waseda University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Waseda University","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072859004","display_name":"Hironori Kasahara","orcid":"https://orcid.org/0000-0001-7984-756X"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hironori KASAHARA","raw_affiliation_strings":["Department of Computer Science and Engineering, Waseda University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Waseda University","institution_ids":["https://openalex.org/I150744194"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5078011005"],"corresponding_institution_ids":["https://openalex.org/I150744194"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.02693555,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"E103.C","issue":"3","first_page":"98","last_page":"109"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8851207494735718},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.7648931741714478},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7326228022575378},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.726290225982666},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.6615725755691528},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.6057653427124023},{"id":"https://openalex.org/keywords/optimizing-compiler","display_name":"Optimizing compiler","score":0.5038947463035583},{"id":"https://openalex.org/keywords/factor","display_name":"Factor (programming language)","score":0.4375857412815094},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3458738923072815},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.18753761053085327},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15539824962615967},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1434517502784729}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8851207494735718},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.7648931741714478},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7326228022575378},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.726290225982666},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.6615725755691528},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.6057653427124023},{"id":"https://openalex.org/C190902152","wikidata":"https://www.wikidata.org/wiki/Q1325106","display_name":"Optimizing compiler","level":3,"score":0.5038947463035583},{"id":"https://openalex.org/C2781039887","wikidata":"https://www.wikidata.org/wiki/Q1391724","display_name":"Factor (programming language)","level":2,"score":0.4375857412815094},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3458738923072815},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.18753761053085327},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15539824962615967},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1434517502784729},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/transele.2019lhp0010","is_oa":false,"landing_page_url":"https://doi.org/10.1587/transele.2019lhp0010","pdf_url":null,"source":{"id":"https://openalex.org/S2489501747","display_name":"IEICE Transactions on Electronics","issn_l":"0916-8524","issn":["0916-8524","1745-1353"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Transactions on Electronics","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6399999856948853}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1506700000","https://openalex.org/W1969288309","https://openalex.org/W2054732504","https://openalex.org/W2085073695","https://openalex.org/W2103657804","https://openalex.org/W2105778948","https://openalex.org/W2107114182","https://openalex.org/W2108845379","https://openalex.org/W2130007585","https://openalex.org/W2136453233","https://openalex.org/W2153581658","https://openalex.org/W2154632001","https://openalex.org/W2158327022","https://openalex.org/W2161147079","https://openalex.org/W2161172908","https://openalex.org/W2163270257","https://openalex.org/W2521670942","https://openalex.org/W2581988209","https://openalex.org/W4240931809"],"related_works":["https://openalex.org/W2002505081","https://openalex.org/W2083681681","https://openalex.org/W2577630842","https://openalex.org/W3146558274","https://openalex.org/W1172579163","https://openalex.org/W1488300410","https://openalex.org/W2138790427","https://openalex.org/W4246454774","https://openalex.org/W2162051035","https://openalex.org/W1597127505"],"abstract_inverted_index":{"Utilization":[0],"of":[1,31,73,103,120,160,166],"local":[2,48,71,172],"memory":[3,35,49,72,86,173],"from":[4,148,174],"real-time":[5],"embedded":[6],"systems":[7,11],"to":[8,45,116],"high":[9],"performance":[10],"with":[12,96,168],"multi-core":[13,74],"processors":[14],"has":[15],"become":[16],"an":[17],"important":[18],"factor":[19],"for":[20,53],"satisfying":[21],"hard":[22],"deadline":[23],"constraints.":[24],"However,":[25],"challenges":[26],"lie":[27],"in":[28],"the":[29,34,101,104,108,118,121,131,141,158,161],"area":[30],"efficiently":[32],"managing":[33],"hierarchy,":[36],"such":[37],"as":[38],"decomposing":[39],"large":[40],"data":[41,82],"into":[42],"small":[43],"blocks":[44,52,87,92],"fit":[46],"onto":[47,83],"and":[50,55,79,136,154],"transferring":[51],"reuse":[54],"replacement.":[56],"To":[57],"address":[58],"this":[59,61],"issue,":[60],"paper":[62],"presents":[63],"a":[64],"compiler":[65,135],"optimization":[66],"method":[67,77,109],"that":[68,179],"automatically":[69],"manage":[70],"processors.":[75],"The":[76,125],"selects":[78],"maps":[80],"multi-dimensional":[81,123],"software":[84],"specified":[85],"called":[88,113],"Adjustable":[89],"Blocks.":[90],"These":[91],"are":[93],"hierarchically":[94],"divisible":[95],"varying":[97],"sizes":[98],"defined":[99],"by":[100],"features":[102],"input":[105],"application.":[106],"Moreover,":[107],"introduces":[110],"mapping":[111],"structures":[112],"Template":[114],"Arrays":[115],"maintain":[117],"indices":[119],"decomposed":[122],"data.":[124],"proposed":[126],"work":[127],"is":[128],"implemented":[129],"on":[130,140],"OSCAR":[132],"automatic":[133],"parallelizing":[134],"evaluations":[137],"were":[138],"performed":[139],"Renesas":[142],"RP2":[143],"8-core":[144],"processor.":[145],"Experimental":[146],"results":[147],"NAS":[149],"Parallel":[150],"Benchmark,":[151],"SPEC":[152],"benchmark,":[153],"multimedia":[155],"applications":[156],"show":[157],"effectiveness":[159],"method,":[162],"obtaining":[163],"maximum":[164],"speed-ups":[165],"20.44":[167],"8":[169],"cores":[170],"utilizing":[171],"single":[175],"core":[176],"sequential":[177],"versions":[178],"use":[180],"off-chip":[181],"memory.":[182]},"counts_by_year":[],"updated_date":"2026-05-05T08:41:31.759640","created_date":"2025-10-10T00:00:00"}