{"id":"https://openalex.org/W2927952459","doi":"https://doi.org/10.1587/transele.2018cdp0007","title":"A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications","display_name":"A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications","publication_year":2019,"publication_date":"2019-03-31","ids":{"openalex":"https://openalex.org/W2927952459","doi":"https://doi.org/10.1587/transele.2018cdp0007","mag":"2927952459"},"language":"en","primary_location":{"id":"doi:10.1587/transele.2018cdp0007","is_oa":false,"landing_page_url":"https://doi.org/10.1587/transele.2018cdp0007","pdf_url":null,"source":{"id":"https://openalex.org/S2489501747","display_name":"IEICE Transactions on Electronics","issn_l":"0916-8524","issn":["0916-8524","1745-1353"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Transactions on Electronics","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019515253","display_name":"Masanori Hayashikoshi","orcid":"https://orcid.org/0000-0002-1962-4708"},"institutions":[{"id":"https://openalex.org/I10091056","display_name":"Kanazawa University","ror":"https://ror.org/02hwp6a56","country_code":"JP","type":"education","lineage":["https://openalex.org/I10091056"]},{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Masanori HAYASHIKOSHI","raw_affiliation_strings":["Kanazawa University","Renesas Electronics Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kanazawa University","institution_ids":["https://openalex.org/I10091056"]},{"raw_affiliation_string":"Renesas Electronics Corporation","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009258779","display_name":"Tanizaki Hiroaki","orcid":null},"institutions":[{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hiroaki TANIZAKI","raw_affiliation_strings":["Renesas Electronics Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Renesas Electronics Corporation","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108337699","display_name":"Yasumitsu Murai","orcid":null},"institutions":[{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yasumitsu MURAI","raw_affiliation_strings":["Renesas Electronics Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Renesas Electronics Corporation","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110518147","display_name":"Takaharu Tsuji","orcid":null},"institutions":[{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Takaharu TSUJI","raw_affiliation_strings":["Renesas Electronics Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Renesas Electronics Corporation","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024201492","display_name":"K. Kawabata","orcid":null},"institutions":[{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kiyoshi KAWABATA","raw_affiliation_strings":["Renesas Electronics Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Renesas Electronics Corporation","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047952713","display_name":"Koji Nii","orcid":"https://orcid.org/0000-0002-9986-5308"},"institutions":[{"id":"https://openalex.org/I10091056","display_name":"Kanazawa University","ror":"https://ror.org/02hwp6a56","country_code":"JP","type":"education","lineage":["https://openalex.org/I10091056"]},{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Koji NII","raw_affiliation_strings":["Kanazawa University","Renesas Electronics Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kanazawa University","institution_ids":["https://openalex.org/I10091056"]},{"raw_affiliation_string":"Renesas Electronics Corporation","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113822636","display_name":"Hideyuki Noda","orcid":null},"institutions":[{"id":"https://openalex.org/I10091056","display_name":"Kanazawa University","ror":"https://ror.org/02hwp6a56","country_code":"JP","type":"education","lineage":["https://openalex.org/I10091056"]},{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Hideyuki NODA","raw_affiliation_strings":["Kanazawa University","Renesas Electronics Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kanazawa University","institution_ids":["https://openalex.org/I10091056"]},{"raw_affiliation_string":"Renesas Electronics Corporation","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090395658","display_name":"Hiroyuki Kondo","orcid":"https://orcid.org/0000-0002-3194-152X"},"institutions":[{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hiroyuki KONDO","raw_affiliation_strings":["Renesas Electronics Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Renesas Electronics Corporation","institution_ids":["https://openalex.org/I75636454"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101675855","display_name":"Yoshio Matsuda","orcid":"https://orcid.org/0000-0003-0114-0219"},"institutions":[{"id":"https://openalex.org/I10091056","display_name":"Kanazawa University","ror":"https://ror.org/02hwp6a56","country_code":"JP","type":"education","lineage":["https://openalex.org/I10091056"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yoshio MATSUDA","raw_affiliation_strings":["Kanazawa University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kanazawa University","institution_ids":["https://openalex.org/I10091056"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046126929","display_name":"Hideto Hidaka","orcid":null},"institutions":[{"id":"https://openalex.org/I75636454","display_name":"Renesas Electronics (United States)","ror":"https://ror.org/014775w70","country_code":"US","type":"company","lineage":["https://openalex.org/I4210153176","https://openalex.org/I75636454"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hideto HIDAKA","raw_affiliation_strings":["Renesas Electronics Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Renesas Electronics Corporation","institution_ids":["https://openalex.org/I75636454"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2335,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.5207325,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"E102.C","issue":"4","first_page":"287","last_page":"295"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12676","display_name":"Machine Learning and ELM","score":0.9930999875068665,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.7143096923828125},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.684140145778656},{"id":"https://openalex.org/keywords/internet-of-things","display_name":"Internet of Things","score":0.6330990791320801},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5633491277694702},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.557628870010376},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5155748724937439},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.46886804699897766},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.45693129301071167},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.42774122953414917},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3815537095069885},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3438805341720581},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28107190132141113},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.23787888884544373},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.0587516725063324}],"concepts":[{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.7143096923828125},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.684140145778656},{"id":"https://openalex.org/C81860439","wikidata":"https://www.wikidata.org/wiki/Q251212","display_name":"Internet of Things","level":2,"score":0.6330990791320801},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5633491277694702},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.557628870010376},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5155748724937439},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.46886804699897766},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.45693129301071167},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.42774122953414917},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3815537095069885},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3438805341720581},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28107190132141113},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.23787888884544373},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0587516725063324},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/transele.2018cdp0007","is_oa":false,"landing_page_url":"https://doi.org/10.1587/transele.2018cdp0007","pdf_url":null,"source":{"id":"https://openalex.org/S2489501747","display_name":"IEICE Transactions on Electronics","issn_l":"0916-8524","issn":["0916-8524","1745-1353"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Transactions on Electronics","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.41999998688697815,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320313220","display_name":"Kindai University","ror":"https://ror.org/05kt9ap64"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1500273969","https://openalex.org/W1545438037","https://openalex.org/W1573873562","https://openalex.org/W1592298766","https://openalex.org/W1602621499","https://openalex.org/W1964504828","https://openalex.org/W1964639445","https://openalex.org/W1966058111","https://openalex.org/W1977463470","https://openalex.org/W1999506977","https://openalex.org/W2010561573","https://openalex.org/W2010795939","https://openalex.org/W2035257891","https://openalex.org/W2035934766","https://openalex.org/W2036961622","https://openalex.org/W2055902603","https://openalex.org/W2056511998","https://openalex.org/W2080779002","https://openalex.org/W2091773052","https://openalex.org/W2094480635","https://openalex.org/W2105401464","https://openalex.org/W2117889325","https://openalex.org/W2138449721","https://openalex.org/W2156728623","https://openalex.org/W2176602003","https://openalex.org/W2289313043","https://openalex.org/W2290149915","https://openalex.org/W2539958918","https://openalex.org/W2544913214","https://openalex.org/W2551533407","https://openalex.org/W2556348685"],"related_works":["https://openalex.org/W3146164987","https://openalex.org/W2086829516","https://openalex.org/W2141626281","https://openalex.org/W1641143370","https://openalex.org/W2472395098","https://openalex.org/W2128922810","https://openalex.org/W1908441109","https://openalex.org/W1579280934","https://openalex.org/W2047360450","https://openalex.org/W2352941988"],"abstract_inverted_index":{"A":[0,47,87],"1-Transistor":[1],"4-Magnetic":[2],"Tunnel":[3],"Junction":[4],"(1T-4MTJ)":[5],"memory":[6,22,45,168],"cell":[7,23,78,106,115],"has":[8,61],"been":[9,62],"proposed":[10,157],"for":[11,172],"field":[12],"type":[13],"of":[14,32,177],"Magnetic":[15],"Random":[16],"Access":[17],"Memory":[18],"(MRAM).":[19],"Proposed":[20],"1T-4MTJ":[21,77,103,159],"array":[24],"is":[25,80,92,121,125,139,162],"achieved":[26],"44%":[27],"higher":[28],"density":[29,105],"than":[30,128],"that":[31,135],"conventional":[33,130,152],"1T-1MTJ":[34,154],"thanks":[35],"to":[36,68],"the":[37,81,114,117,129,136],"common":[38],"access":[39,138],"transistor":[40],"structure":[41],"in":[42,57,84],"a":[43],"4-bit":[44],"cell.":[46],"self-reference":[48],"sensing":[49],"scheme":[50],"which":[51,124],"can":[52],"read":[53,137],"out":[54],"with":[55,70,151],"write-back":[56],"four":[58],"clock":[59],"cycles":[60],"also":[63],"proposed.":[64],"Furthermore,":[65],"we":[66],"add":[67],"estimate":[69],"considering":[71],"sense":[72],"amplifier":[73],"variation":[74],"and":[75,94,107,148,156,175],"show":[76],"configuration":[79],"best":[82],"solution":[83],"IoT":[85,178],"applications.":[86,179],"1-Mbit":[88,118],"MRAM":[89],"test":[90],"chip":[91],"designed":[93],"fabricated":[95],"successfully":[96],"using":[97],"130-nm":[98],"CMOS":[99],"process.":[100],"By":[101],"applying":[102],"high":[104],"partially":[108],"embedded":[109],"wordline":[110],"driver":[111],"peripheral":[112],"into":[113],"array,":[116],"macro":[119],"size":[120],"4.04":[122],"mm2":[123],"35.7%":[126],"smaller":[127],"one.":[131],"Measured":[132],"data":[133],"shows":[134],"55":[140],"ns":[141],"at":[142],"1.5":[143],"V":[144],"typical":[145],"supply":[146],"voltage":[147],"25C.":[149],"Combining":[150],"high-speed":[153],"caches":[155],"high-density":[158],"user":[160],"memories":[161],"an":[163],"effective":[164],"on-chip":[165],"hierarchical":[166],"non-volatile":[167],"solution,":[169],"being":[170],"implemented":[171],"low-power":[173],"MCUs":[174],"SoCs":[176]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
