{"id":"https://openalex.org/W1991081132","doi":"https://doi.org/10.1587/elex.5.446","title":"A pre-emphasis output buffer control scheme for a GDDR3 SDRAM interface","display_name":"A pre-emphasis output buffer control scheme for a GDDR3 SDRAM interface","publication_year":2008,"publication_date":"2008-01-01","ids":{"openalex":"https://openalex.org/W1991081132","doi":"https://doi.org/10.1587/elex.5.446","mag":"1991081132"},"language":"en","primary_location":{"id":"doi:10.1587/elex.5.446","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.5.446","pdf_url":"https://www.jstage.jst.go.jp/article/elex/5/12/5_12_446/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://www.jstage.jst.go.jp/article/elex/5/12/5_12_446/_pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112418340","display_name":"Sang Joon Hwang","orcid":null},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Sang Joon Hwang","raw_affiliation_strings":["Dept. of Electrical Engineering, Korea University"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical Engineering, Korea University","institution_ids":["https://openalex.org/I197347611"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109973113","display_name":"Young Hyun Jun","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Young Hyun Jun","raw_affiliation_strings":["DRAM Design Team, Memory Division, Samsung Electronics Co., Ltd"],"affiliations":[{"raw_affiliation_string":"DRAM Design Team, Memory Division, Samsung Electronics Co., Ltd","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052419218","display_name":"Man Young Sung","orcid":"https://orcid.org/0000-0002-5524-4585"},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Man Young Sung","raw_affiliation_strings":["Dept. of Electrical Engineering, Korea University"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical Engineering, Korea University","institution_ids":["https://openalex.org/I197347611"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5112418340"],"corresponding_institution_ids":["https://openalex.org/I197347611"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":{"value":0.09034559,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"5","issue":"12","first_page":"446","last_page":"450"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9836999773979187,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.8419461250305176},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5818403363227844},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.5781142115592957},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.5293883681297302},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.5197324752807617},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.47273221611976624},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45109957456588745},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.4343907833099365},{"id":"https://openalex.org/keywords/instruction-prefetch","display_name":"Instruction prefetch","score":0.4271215796470642},{"id":"https://openalex.org/keywords/buffer","display_name":"Buffer (optical fiber)","score":0.4124619960784912},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24956652522087097},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.14937424659729004},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12193098664283752},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09978082776069641},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07438218593597412}],"concepts":[{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.8419461250305176},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5818403363227844},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.5781142115592957},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.5293883681297302},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.5197324752807617},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.47273221611976624},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45109957456588745},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.4343907833099365},{"id":"https://openalex.org/C133588205","wikidata":"https://www.wikidata.org/wiki/Q28455645","display_name":"Instruction prefetch","level":3,"score":0.4271215796470642},{"id":"https://openalex.org/C145018004","wikidata":"https://www.wikidata.org/wiki/Q4985944","display_name":"Buffer (optical fiber)","level":2,"score":0.4124619960784912},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24956652522087097},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.14937424659729004},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12193098664283752},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09978082776069641},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07438218593597412},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/elex.5.446","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.5.446","pdf_url":"https://www.jstage.jst.go.jp/article/elex/5/12/5_12_446/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1587/elex.5.446","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.5.446","pdf_url":"https://www.jstage.jst.go.jp/article/elex/5/12/5_12_446/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7900000214576721}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W1991081132.pdf","grobid_xml":"https://content.openalex.org/works/W1991081132.grobid-xml"},"referenced_works_count":2,"referenced_works":["https://openalex.org/W1556480701","https://openalex.org/W1580581276"],"related_works":["https://openalex.org/W2140324148","https://openalex.org/W2121199344","https://openalex.org/W2285914869","https://openalex.org/W3117515082","https://openalex.org/W2113441357","https://openalex.org/W3022537591","https://openalex.org/W2126134823","https://openalex.org/W2336226224","https://openalex.org/W1974128693","https://openalex.org/W2141696484"],"abstract_inverted_index":{"The":[0,35],"keys":[1],"to":[2,17,55],"good":[3],"signal":[4],"integrity":[5],"in":[6],"a":[7,14],"Graphic":[8],"DDR3":[9],"(GDDR3)":[10],"SDRAM":[11],"interface":[12],"for":[13],"bandwidth":[15],"up":[16],"1.4Gbps/pin":[18],"are":[19],"the":[20,27,31,56,59,72],"minimization":[21,46],"of":[22,30,50,64],"input/output":[23,51],"pin":[24,52],"capacitance":[25],"and":[26,71],"accurate":[28],"control":[29,40],"output":[32,38,43,60,74],"data":[33,44,61,73],"skew.":[34],"proposed":[36,65],"pre-emphasis":[37],"buffer":[39],"scheme":[41,66],"provides":[42],"skew":[45,75],"without":[47],"an":[48],"increase":[49],"capacitance.":[53],"Compared":[54],"conventional":[57],"scheme,":[58],"aperture":[62],"window":[63],"has":[67,76],"increased":[68],"by":[69,78],"18%":[70],"decreased":[77],"48%.":[79]},"counts_by_year":[{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}