{"id":"https://openalex.org/W7117106663","doi":"https://doi.org/10.1587/elex.22.20250699","title":"A low-offset balanced inverter and its application to a current-integrating delta-sigma ADC","display_name":"A low-offset balanced inverter and its application to a current-integrating delta-sigma ADC","publication_year":2025,"publication_date":"2025-12-23","ids":{"openalex":"https://openalex.org/W7117106663","doi":"https://doi.org/10.1587/elex.22.20250699"},"language":"en","primary_location":{"id":"doi:10.1587/elex.22.20250699","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.22.20250699","pdf_url":"https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_22.20250699/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_22.20250699/_pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Taehyoung Kim","orcid":"https://orcid.org/0000-0001-6557-1371"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Taehyoung Kim","raw_affiliation_strings":["School of Integrated Technology, Yonsei University"],"raw_orcid":"https://orcid.org/0000-0001-6557-1371","affiliations":[{"raw_affiliation_string":"School of Integrated Technology, Yonsei University","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006810192","display_name":"Kiwon Seo","orcid":null},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kiwon Seo","raw_affiliation_strings":["School of Integrated Technology, Yonsei University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Technology, Yonsei University","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005751198","display_name":"Jongho Jung","orcid":"https://orcid.org/0000-0001-8201-2264"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jongho Jung","raw_affiliation_strings":["School of Integrated Technology, Yonsei University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Technology, Yonsei University","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100895869","display_name":"Gunhee Han","orcid":null},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Gunhee Han","raw_affiliation_strings":["Dept. of Systems Semiconductor Engineering, Yonsei University","School of Integrated Technology, Yonsei University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Systems Semiconductor Engineering, Yonsei University","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"School of Integrated Technology, Yonsei University","institution_ids":["https://openalex.org/I193775966"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.50395347,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"23","issue":"4","first_page":"20250699","last_page":"20250699"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9891999959945679,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9891999959945679,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.0019000000320374966,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.0010999999940395355,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.8118000030517578},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.7312999963760376},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.7210999727249146},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5940999984741211},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5188000202178955},{"id":"https://openalex.org/keywords/lossless-compression","display_name":"Lossless compression","score":0.47209998965263367},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.46970000863075256}],"concepts":[{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.8118000030517578},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.7312999963760376},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.7210999727249146},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5940999984741211},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5753999948501587},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5188000202178955},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.508400022983551},{"id":"https://openalex.org/C81081738","wikidata":"https://www.wikidata.org/wiki/Q55542","display_name":"Lossless compression","level":3,"score":0.47209998965263367},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.46970000863075256},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4668999910354614},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.4341000020503998},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.4311999976634979},{"id":"https://openalex.org/C2776310492","wikidata":"https://www.wikidata.org/wiki/Q3271420","display_name":"12-bit","level":3,"score":0.3815999925136566},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3792000114917755},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.3569999933242798},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.3547999858856201},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.2872999906539917},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2680000066757202},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2542000114917755}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/elex.22.20250699","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.22.20250699","pdf_url":"https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_22.20250699/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1587/elex.22.20250699","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.22.20250699","pdf_url":"https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_22.20250699/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.826309323310852}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322202","display_name":"IC Design Education Center","ror":"https://ror.org/005v57z85"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W7117106663.pdf","grobid_xml":"https://content.openalex.org/works/W7117106663.grobid-xml"},"referenced_works_count":32,"referenced_works":["https://openalex.org/W1981600607","https://openalex.org/W1990475330","https://openalex.org/W1998898964","https://openalex.org/W2011554832","https://openalex.org/W2026344992","https://openalex.org/W2033230242","https://openalex.org/W2039475683","https://openalex.org/W2043491541","https://openalex.org/W2065808645","https://openalex.org/W2071848335","https://openalex.org/W2088350283","https://openalex.org/W2102388997","https://openalex.org/W2107683251","https://openalex.org/W2163273626","https://openalex.org/W2167563832","https://openalex.org/W2289229811","https://openalex.org/W2522828564","https://openalex.org/W2588967464","https://openalex.org/W2602440913","https://openalex.org/W2736536771","https://openalex.org/W2766416496","https://openalex.org/W2774028784","https://openalex.org/W2913453087","https://openalex.org/W2914884641","https://openalex.org/W2972054101","https://openalex.org/W4233804463","https://openalex.org/W4293173875","https://openalex.org/W4390221913","https://openalex.org/W4400314858","https://openalex.org/W4410086678","https://openalex.org/W4410493186","https://openalex.org/W4414599090"],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,9,22,25,38,50,58,75,104],"low-offset":[4],"balanced":[5,69],"inverter":[6,70],"that":[7,79,98],"forms":[8],"push-pull":[10],"structure":[11],"using":[12],"two":[13],"composite":[14,17],"transistors.":[15],"Each":[16],"transistor":[18],"operates":[19],"as":[20],"either":[21],"current-sourcing":[23],"or":[24],"current-sinking":[26],"device,":[27],"and":[28,34,46,118],"can":[29],"replace":[30],"both":[31],"the":[32,44,55,81,89,94,99,116],"PMOS":[33],"NMOS":[35],"transistors":[36],"in":[37],"CMOS":[39],"inverter.":[40],"The":[41,67],"symmetry":[42],"between":[43],"pull-up":[45],"pull-down":[47],"paths":[48],"achieves":[49],"very":[51],"low":[52],"offset,":[53],"enabling":[54],"implementation":[56],"of":[57,83],"single-ended,":[59],"lossless":[60],"integrator":[61],"without":[62],"requiring":[63],"any":[64],"offset":[65],"cancellation.":[66],"proposed":[68],"is":[71],"applied":[72],"to":[73],"realize":[74],"second-order":[76],"delta-sigma":[77],"ADC":[78,102],"digitizes":[80],"integration":[82],"extremely":[84],"weak":[85],"input":[86],"currents":[87],"from":[88,93],"resistor.":[90],"Experimental":[91],"results":[92],"fabricated":[95],"chip":[96],"demonstrate":[97],"resistor":[100],"measuring":[101],"achieved":[103],"0.4-\u03a9":[105],"resolution":[106],"over":[107],"106-dB":[108],"dynamic":[109],"range,":[110],"confirming":[111],"its":[112],"practical":[113],"applicability":[114],"despite":[115],"process":[117],"temperature":[119],"variations.":[120]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-12-24T00:00:00"}