{"id":"https://openalex.org/W2623582392","doi":"https://doi.org/10.1587/elex.14.20170501","title":"Memory interface design for AVS HD video encoder with Level C+ coding order","display_name":"Memory interface design for AVS HD video encoder with Level C+ coding order","publication_year":2017,"publication_date":"2017-01-01","ids":{"openalex":"https://openalex.org/W2623582392","doi":"https://doi.org/10.1587/elex.14.20170501","mag":"2623582392"},"language":"en","primary_location":{"id":"doi:10.1587/elex.14.20170501","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.14.20170501","pdf_url":"https://www.jstage.jst.go.jp/article/elex/14/12/14_14.20170501/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://www.jstage.jst.go.jp/article/elex/14/12/14_14.20170501/_pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067386769","display_name":"Xiaofeng Huang","orcid":"https://orcid.org/0000-0002-8479-6960"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Xiaofeng Huang","raw_affiliation_strings":["NVIDIA Co"],"affiliations":[{"raw_affiliation_string":"NVIDIA Co","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066825855","display_name":"Kaijin Wei","orcid":null},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kaijin Wei","raw_affiliation_strings":["Peking University"],"affiliations":[{"raw_affiliation_string":"Peking University","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038924501","display_name":"Guoqing Xiang","orcid":"https://orcid.org/0000-0001-5831-1897"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guoqing Xiang","raw_affiliation_strings":["Peking University"],"affiliations":[{"raw_affiliation_string":"Peking University","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027946490","display_name":"Huizhu Jia","orcid":"https://orcid.org/0000-0002-2778-3768"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Huizhu Jia","raw_affiliation_strings":["Peking University"],"affiliations":[{"raw_affiliation_string":"Peking University","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071236741","display_name":"Don Xie","orcid":null},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Don Xie","raw_affiliation_strings":["Peking University"],"affiliations":[{"raw_affiliation_string":"Peking University","institution_ids":["https://openalex.org/I20231570"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5067386769"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.05678603,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"14","issue":"12","first_page":"20170501","last_page":"20170501"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11165","display_name":"Image and Video Quality Assessment","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7979475259780884},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.7608162760734558},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5452807545661926},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4890790581703186},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.48272010684013367},{"id":"https://openalex.org/keywords/auxiliary-memory","display_name":"Auxiliary memory","score":0.4690055549144745},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45997169613838196},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4161542057991028},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.41327643394470215},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.21979638934135437},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.16062712669372559},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10166686773300171}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7979475259780884},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.7608162760734558},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5452807545661926},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4890790581703186},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.48272010684013367},{"id":"https://openalex.org/C82687282","wikidata":"https://www.wikidata.org/wiki/Q66221","display_name":"Auxiliary memory","level":2,"score":0.4690055549144745},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45997169613838196},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4161542057991028},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.41327643394470215},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.21979638934135437},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.16062712669372559},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10166686773300171},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/elex.14.20170501","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.14.20170501","pdf_url":"https://www.jstage.jst.go.jp/article/elex/14/12/14_14.20170501/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1587/elex.14.20170501","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.14.20170501","pdf_url":"https://www.jstage.jst.go.jp/article/elex/14/12/14_14.20170501/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.5199999809265137,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2623582392.pdf","grobid_xml":"https://content.openalex.org/works/W2623582392.grobid-xml"},"referenced_works_count":8,"referenced_works":["https://openalex.org/W1980222261","https://openalex.org/W2096200911","https://openalex.org/W2114860362","https://openalex.org/W2118249800","https://openalex.org/W2136004815","https://openalex.org/W2143851402","https://openalex.org/W2144820986","https://openalex.org/W2167328457"],"related_works":["https://openalex.org/W2364622490","https://openalex.org/W2984139344","https://openalex.org/W2398743891","https://openalex.org/W1580607742","https://openalex.org/W2070686591","https://openalex.org/W2345611555","https://openalex.org/W2202150804","https://openalex.org/W2891552639","https://openalex.org/W2161686493","https://openalex.org/W3035532779"],"abstract_inverted_index":{"In":[0],"video":[1,62],"encoder":[2,16,134],"chip,":[3],"memory":[4,26,31,41,91,124],"interface":[5,42,92,125],"design":[6,93,126],"is":[7,94,127],"a":[8],"must":[9],"to":[10,77,115],"transfer":[11],"various":[12],"data":[13],"between":[14],"the":[15,19,23,30,35,117],"pipeline":[17,85,102],"and":[18,28,82,104,111],"off-chip":[20,25],"memory.":[21],"Reducing":[22],"required":[24],"bandwidth":[27,80],"improving":[29],"access":[32,118],"efficiency":[33,119],"are":[34,52,75,113],"two":[36,47],"key":[37],"targets":[38],"for":[39],"optimized":[40,123],"design.":[43],"To":[44],"achieve":[45,78],"these":[46],"targets,":[48],"three":[49],"novel":[50],"technologies":[51],"proposed":[53,76,95,114],"in":[54],"Level":[55,67],"C+":[56,68],"coding":[57,69],"order":[58,70],"based":[59],"AVS":[60,133],"HD":[61],"encoder.":[63],"Firstly,":[64],"an":[65,140],"improved":[66],"with":[71,135],"necessary":[72],"NOP":[73],"insertions":[74],"61%":[79],"reduction":[81],"make":[83],"MB":[84,101],"scheduling":[86],"regular.":[87],"Secondly,":[88],"MB-level":[89],"synchronous":[90],"by":[96,120],"trading":[97],"off":[98],"external":[99],"bandwidth,":[100],"structure,":[103],"internal":[105],"buffer":[106],"size.":[107],"Finally,":[108],"address":[109],"mapping":[110],"arbitration":[112],"improve":[116],"12%.":[121],"The":[122],"successfully":[128],"implemented":[129],"on":[130],"our":[131],"1080P@45fps":[132],"Xilinx":[136],"Virtex-6":[137],"FPGA":[138],"at":[139],"operating":[141],"frequency":[142],"of":[143],"200":[144],"MHz.":[145]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}